Volume 3: Instruction Formats
3:293
Instruction Formats
4
Each Itanium instruction is categorized into one of six types; each instruction type may
be executed on one or more execution unit types.
and the execution unit type on which they are executed:
Three instructions are grouped together into 128-bit sized and aligned containers called
bundles
. Each bundle contains three 41-bit
instruction slots
and a 5-bit template
field. The format of a bundle is depicted in
.
The template field specifies two properties: stops within the current bundle, and the
mapping of instruction slots to execution unit types. Not all combinations of these two
properties are allowed -
indicates the defined combinations. The three
rightmost columns correspond to the three instruction slots in a bundle; listed within
each column is the execution unit type controlled by that instruction slot for each
encoding of the template field. A double line to the right of an instruction slot indicates
that a stop occurs at that point within the current bundle. See
for the definition of a stop. Within a bundle, execution order
proceeds from slot 0 to slot 2. Unused template values (appearing as empty rows in
) are reserved and cause an Illegal Operation fault.
Extended instructions, used for long immediate integer and long branch instructions,
occupy two instruction slots. Depending on the major opcode, extended instructions
execute on a B-unit (long branch/call) or an I-unit (all other L+X instructions).
Table 4-1.
Relationship between Instruction Type and Execution Unit Type
Instruction
Type
Description
Execution Unit Type
A
Integer ALU
I-unit or M-unit
I
Non-ALU integer
I-unit
M
Memory
M-unit
F
Floating-point
F-unit
B
Branch
B-unit
L+X
Extended
I-unit/B-unit
a
a. L+X Major Opcodes 0 - 7 execute on an I-unit. L+X Major Opcodes 8 - F execute on a B-unit.
Figure 4-1.
Bundle Format
127
87 86
46 45
5
4
0
instruction slot 2
instruction slot 1
instruction slot 0
template
41
41
41
5
Summary of Contents for Itanium 9150M
Page 1: ......
Page 209: ...3 200 Volume 3 Instruction Reference padd Interruptions Illegal Operation fault...
Page 405: ...3 396 Volume 3 Resource and Dependency Semantics...
Page 406: ...3 397 Intel Itanium Architecture Software Developer s Manual Rev 2 3 Index...
Page 407: ...3 398 Intel Itanium Architecture Software Developer s Manual Rev 2 3...
Page 419: ...INDEX Index 12 Index for Volumes 1 2 3 and 4...
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