
Volume 3: Instruction Reference
3:63
fchkf
fchkf — Floating-point Check Flags
Format:
(
qp
) fchkf.
sf target
25
Description:
The flags in FPSR.
sf
.flags are compared with FPSR.s0.flags and FPSR.traps. If any flags
set in FPSR.
sf
.flags correspond to FPSR.traps which are enabled, or if any flags set in
FPSR.
sf
.flags are not set in FPSR.s0.flags, then a branch to
target
25
is taken.
The
target
25
operand, specifies a label to branch to. This is encoded in the instruction
as a signed immediate displacement (
imm
21
) between the target bundle and the bundle
containing this instruction (
imm
21
=
target
25
- IP >> 4).
The branching behavior of this instruction can be optionally unimplemented. If the
instruction would have branched, and the branching behavior is not implemented, then
a Speculative Operation fault is taken and the value specified by
imm
21
is zero-extended
and placed in the Interruption Immediate control register (IIM). The fault handler
emulates the branch by sign-extending the IIM value, adding it to IIP and returning.
The mnemonic values for
sf
are given in
.
Operation:
if (PR[
qp
]) {
switch (sf) {
case ‘s0’:
tmp_flags = AR[FPSR].sf0.flags;
break;
case ‘s1’:
tmp_flags = AR[FPSR].sf1.flags;
break;
case ‘s2’:
tmp_flags = AR[FPSR].sf2.flags;
break;
case ‘s3’:
tmp_flags = AR[FPSR].sf3.flags;
break;
}
if ((tmp_flags & ~AR[FPSR].traps) || (tmp_flags & ~AR[FPSR].sf0.flags)) {
if (check_branch_implemented(FCHKF)) {
taken_branch = 1;
IP = IP + sign_ext((
imm
21
<< 4), 25);
if (!impl_uia_fault_supported() &&
((PSR.it && unimplemented_virtual_address(IP, PSR.vm))
|| (!PSR.it && unimplemented_physical_address(IP)))
unimplemented_instruction_address_trap(0, IP);
if (PSR.tb)
taken_branch_trap();
} else
speculation_fault(FCHKF, zero_ext(
imm
21
, 21));
}
}
FP Exceptions:
None
Interruptions:
Speculative Operation fault
Taken Branch trap
Unimplemented Instruction Address trap
Summary of Contents for Itanium 9150M
Page 1: ......
Page 209: ...3 200 Volume 3 Instruction Reference padd Interruptions Illegal Operation fault...
Page 405: ...3 396 Volume 3 Resource and Dependency Semantics...
Page 406: ...3 397 Intel Itanium Architecture Software Developer s Manual Rev 2 3 Index...
Page 407: ...3 398 Intel Itanium Architecture Software Developer s Manual Rev 2 3...
Page 419: ...INDEX Index 12 Index for Volumes 1 2 3 and 4...
Page 420: ......