Intel 6300ESB ICH, Design Manual

Page: 287 / 320

January 2007 287
Intel
®
855GME Chipset and Intel
®
6300ESB ICH Embedded Platform Design Guide
Schematic Checklist Summary
PIRQ[A:D]#
Recommend a 2.7 K
Ω
pull-up
resistor to V
CC
5 or 8.2 K
Ω
to
V
CC
3.3.
Recommend a 2.7 K
Ω
pull-up resistor to V
CC
5 or
8.2 K
Ω
to V
CC
3.3.
In Non-APIC Mode,
the PIRQx# signals
may be routed to
interrupts 3, 4, 5, 6, 7,
9, 10, 11, 12, 14, or 15
as described in
Section 9.9.2 .
Each PIRQx# line has
a separate Route
Control Register. (See
the 6300ESB EDS for
more information.)
In APIC mode, these
signals are connected
to the internal I/O
APIC in the following
fashion:
• PIRQ[A]# is
connected to
IRQ16
• PIRQ[B]# is
connected to
IRQ17
• PIRQ[C]# is
connected to
IRQ18
• PIRQ[D]# is
connected to
IRQ19
REQ#[0:3]
Recommend an 8.2 K
Ω
pull-up
resistor to V
CC
3.3 or a 2.7 K
Ω
pull-
up resistor to V
CC
5
Recommend an 8.2 K
Ω
pull-up resistor to V
CC
3.3
or a 2.7 K
Ω
pull-up resistor
to V
CC
5
See PCI 2.2
Component
Specification
pull-up
recommendations for
V
CC
3.3 and V
CC
5.
GNT#[0:3]
No external pull-up resistors are
required on PCI GNT signals.
However, when external pull-up
resistors are implemented they
must be pulled up to V
CC
3.3.
May leave as no connect
These signals are
actively driven by the
6300ESB.
AD[0:31],C/
BE[0:3]#
No extra pull-up needed
Recommend 8.2 K
Ω
pull-
up resistors to V
CC
3.3
IDSEL (on PCI
Connectors)
A 300
Ω
to 900
Ω
series resistor on
IDSEL should be connected to the
PCI AD bus,
N/A
Improves signal
quality when
connected
Table 133. PCI Interface Checklist (Sheet 3 of 3)
Checklist Items Recommendations Interface not used Reason/Impact