144
Intel
®
855GME Chipset and Intel
®
6300ESB ICH Embedded Platform Design Guide
System Memory Design Guidelines (DDR-SDRAM)
5.4.6.3
Command Topology Length Matching Requirements
The routing length of the command signals, between the GMCH die-pad and the DIMM must be
within the range defined below, with respect to the associated clock reference length. Refer to
for a definition of the various motherboard trace segments. The length of trace from the
DIMM to the termination resistor need not be length matched.
Length range formula for DIMM0:
X
0
= SCK[2:0]/SCK[2:0]# total reference length, including package length. Refer to
for more information.
Y
0
= CMD signal total length = GMCH p L1, as shown in
, where:
(X
0
– 1.5”)
≤
Y
0
≤
(X
0
+ 1.0”)
Length range formula for DIMM1:
X
1
= SCK[5:3]/SCK[5:3]# total reference length, including package length. Refer to
for more information.
Y
1
= CMD signal total length = GMCH p L1 + L2 + L3, as shown in
, where:
(X
1
– 1.5”)
≤
Y
1
≤
(X
1
+ 1.0”)
No length matching is required from DIMM1 to the termination resistor.
depicts the
length matching requirements between the command signals and clock. A nominal CMD package
length of 500 mils may be used to estimate baseline Mbyte lengths. Refer to
for more
details on package length compensation.
Parallel Termination Resistor (Rt)
56
Ω
± 5%
Maximum Recommended Motherboard Via Count
Per Signal
6
Length Matching Requirements
CMD to SCK/SCK#
and
for details.
Table 38. Command Topology Routing Guidelines (Sheet 2 of 2)
Parameter
Routing Guidelines
NOTES:
1. Recommended resistor values and trace lengths may change in a later revision of the design guide.
2. Power distribution vias from Rt to Vtt are not included in this count.
3. The overall maximum and minimum length to the DIMM must comply with clock length matching
requirements.
4. It is possible to route using three vias if one via is shared that connects to the DIMM1 pad and parallel
termination resistor.
Summary of Contents for 6300ESB ICH
Page 24: ...24 Intel 855GME Chipset and Intel 6300ESB ICH Embedded Platform Design Guide Introduction...
Page 102: ...102 Intel 855GME Chipset and Intel 6300ESB ICH Embedded Platform Design Guide...
Page 122: ...122 Intel 855GME Chipset and Intel 6300ESB ICH Embedded Platform Design Guide...
Page 190: ...190 Intel 855GME Chipset and Intel 6300ESB ICH Embedded Platform Design Guide Hub Interface...
Page 318: ...318 Intel 855GME Chipset and Intel 6300ESB ICH Embedded Platform Design Guide Layout Checklist...
