Intel 6300ESB ICH, Design Manual

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Intel
®
855GME Chipset and Intel
®
6300ESB ICH Embedded Platform Design Guide
Intel
®
6300ESB Design Guidelines
9.4 AC’97.
The 6300ESB implements an AC’97 2.2 compliant digital controller. Please contact your codec
IHV (Independent Hardware Vendor) for information on 2.2 compliant products. The AC’97 2.2
Specification
is on the Intel web site:
http://www.intel.com/design/chipsets/audio/
The AC-link is a unidirectional, serial PCM digital stream. It handles multiple input and output
data streams, as well as control register accesses, employing a time division multiplexed (TDM)
scheme. The AC-link architecture provides for data transfer through individual frames transmitted
in a serial fashion. Each frame is divided into 12 outgoing and 12 incoming data streams, or slots.
The architecture of the 6300ESB AC-link allows a maximum of three codecs to be connected.
Figure 99 shows a three-codec topology of the AC-link for the 6300ESB.
Note: The following routing guidelines are created using the stack-up described in Section 3.1, “Nominal
Board Stack-Up” on page 33 .
Figure 99. 6300ESB AC'97 - Codec Connection
NOTES:
1. When a modem codec is configured as the primary AC-link codec, there cannot be any audio codecs
residing on the AC-link.
2. The primary codec must be connected to AC_SDIN2 when also routing to CNR. If CNR does not exist on
the platform, the primary codec may be connected to AC_8DIN0 as documented in the Intel
®
6300ESB I/O
Controller Hub Datasheet
B2847-01
AC_RST#
AC_SDOUT
Primary
Codec
AC / MC / AMC
AC / MC / AMC
Secondary
Codec
AC_SYNC
AC_BIT_CLK
AC_SDIN2
AC_SDIN1
AC_SDIN0
AC / MC / AMC
Tertiary
Codec
Intel
®
6300ESB
I/O Controller
Hub