Intel 6300ESB ICH, Design Manual

Page: 296 / 320

296
Intel
®
855GME Chipset and Intel
®
6300ESB ICH Embedded Platform Design Guide
Schematic Checklist Summary
PDDACK#,
PDIOR#,
PDIOW#,
PDA[2:0],
PDCS1#,
PDCS3#,
SDDACK#,
SDIOR#,
SDIOW#
SDA[2:0],
SDCS1#,
SDCS3#
No extra series termination
resistors. Pads for series resistors
may be implemented should the
system designer have signal
integrity concerns.
May leave as no
connect
These signals have
integrated series resistors.
NOTE: Simulation data
indicates that the
integrated series
termination
resistors are a
nominal 33
Ω
but
may range from
21
Ω
to 75
Ω
.
PDDREQ,
SDDREQ
No extra series termination
resistors.
No pull down resistors needed.
May leave as no
connect
These signals have
integrated series resistors
in the 6300ESB.
These signals have
integrated pull down
resistors in the 6300ESB.
PIORDY,
SIORDY
Pull-up to V
CC
3.3 through 4.7 K
Ω
resistors.
No extra series termination
resistors.
Pull-up to V
CC
3.3
through 4.7 K
Ω
resistors.
These signals have
integrated series resistors
in the 6300ESB.
IRQ14, IRQ15
Recommend 8.2 K
Ω
to 10 K
Ω
pull-
up resistors to VCC3.3.
No extra series termination
resistors.
Pull-up to V
CC
3.3
through 8.2 K
Ω
to
10 K
Ω
resistors.
IDERST#
(On connector)
The PCIRST# signal should be
buffered to form the IDERST#
signal. A 33
Ω
series termination
resistor is recommended on this
signal.
N/A
Cable Detect
Host Side/Device Side Detection
( recommended method ):
Connect IDE pin PDIAG#/CBLID#
to an 6300ESB GPIO pin. Connect
a 10 K
Ω
resistor to GND on the
signal line.
Device Side Detection:
Connect a 0.047 µF capacitor from
IDE pin PDIAG#/CBLID# to GND.
No 6300ESB connection.
N/A
The 10 K
Ω
resistor to GND
prevents GPI from floating
when no devices are
present on either IDE
interface. Allows use of 3.3
V and 5 V tolerant GPIOs.
NOTE: All Ultra DMA
drives supporting
modes greater
than Mode 2 will
have the
capability to
detect cables.
Table 146. IDE Checklist (Sheet 2 of 2)
Checklist Items Recommendations Interface Not Used Reason/Impact