January 2007
213
Intel
®
855GME Chipset and Intel
®
6300ESB ICH Embedded Platform Design Guide
Intel
®
6300ESB Design Guidelines
NOTE: Many options are given for motherboard trace length and CNR card trace length, choose the
parameters that best suit your system.
NOTE: Two options are given for motherboard trace length, Cable Length and Front panel Length, choose the
parameters that best suit your system.
9.6.2
Plane Splits, Voids and Cut-Outs (Anti-Etch)
The following guidelines apply to the use of plane splits voids and cut-outs.
9.6.2.1
V
CC
Plane Splits, Voids, and Cut-Outs (Anti-Etch)
Use the following guidelines for the V
CC
plane.
Traces should not cross anti-etch, for it greatly increases the return path for those signal traces. This
applies to USB 2.0 signals, high-speed clocks, and signal traces as well as slower signal traces
which might be coupling to them. USB signaling is not purely differential in all speeds (i.e., the
Full-speed Single Ended Zero is common mode).
Note:
Avoid routing of USB 2.0 signals 25 mils of any anti-etch to avoid coupling to the next split or
radiating from the edge of the PCB.
When breaking signals out from packages it is sometimes very difficult to avoid crossing plane
splits or changing signal layers, particularly in today’s motherboard environment that uses several
different voltage planes. Changing signal layers is preferable to crossing plane splits when a choice
has to be made between one or the other.
Table 84.
USB 2.0 CNR Trace Length Guidelines (Common-mode Choke, 55
Ω
± 10%)
Differential
Impedance
Pair Spacing
Maximum
Motherboard Trace
Length
Maximum CNR Card
Length
Signal Matching
100 ± 10%
45 mils
1.0 inches
5.6 inches
The max
mismatch
between data
pairs should not
be greater than
60 mils
2 inches
4 inches
5 inches
2 inches
80 mils
1.9 inches
6 inches
3.5 inches
4 inches
6.2 inches
2 inches
Table 85.
USB 2.0 Front Panel Trace Length Guidelines (Common-mode Choke, 55
Ω
± 10%)
Differential
Impedance
Pair Spacing
Maximum Cable
Length
Maximum
Motherboard
Trace Length
Maximum Front
Panel Length
Signal Matching
100 ± 10%
45 mils
9.1 inches
4.9 inches
1.5 inches
The max
mismatch
between data
pairs should not
be greater than
60 mils
6.5 inches
5.47 inches
2.5 inches
Summary of Contents for 6300ESB ICH
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Page 190: ...190 Intel 855GME Chipset and Intel 6300ESB ICH Embedded Platform Design Guide Hub Interface...
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