4.1.5
YAIC Diagnostics
The YAIC performs the following self-diagnostic tests:
•
A power-up self-test that includes checks of RAM, flash memory, Ethernet ports, and most of the processor board
hardware
•
Continuous monitoring of the internal power supplies for correct operation
•
A check of the electronic ID information from the terminal board, acquisition board, and processor board to confirm that
the hardware set matches, followed by a check that the application code loaded from flash memory is correct for the
hardware set
•
Each analog input has hardware limit checking based on configurable high and low levels for 4-20 mA inputs and preset
(non-configurable) levels for ± 5 V, ± 10 V, and ± 1 mA inputs. If the limit is exceeded, then the I/O pack raises an alarm
and marks the input as unhealthy. A logic signal (L3DIAG_pack) is set, which refers to the entire board.
•
Each input has configurable system limit checking with high and low levels, latching, and non-latching selection options.
These limits can be used in the programming of the controller to generate process alarms. This controller logic requires
using a RSTSYS pin on a SYS_OUTPUTS block to reset the out of limits status when the latch is enabled. System limit
checking can be configured as Enable/Disable at point level, and are only functional only when system limits are enabled
at module level (Parameters tab).
•
The analog input hardware includes precision reference voltages in each scan. Measured values are compared against
expected values and are used to confirm health of the analog to digital converter circuits.
•
Analog output current is sensed on the terminal board using a small burden resistor. The I/O pack conditions this signal
and compares it to the commanded current to confirm health of the digital to analog converter circuits.
•
The analog output suicide relay is continuously monitored for agreement between commanded state and feedback
indication.
Details of the individual diagnostics are available from the ToolboxST application. The diagnostic signals can be individually
latched and then reset with the RSTDIAG signal if they go healthy.
4.1.5.1
Status LEDs
Relay Application LEDs
LED
Label
Description
Yellow
ENA1
Indicates the closure of the relay controlling output 1
Yellow
ENA2
Indicate the closure of the relay controlling output 2
YAIC Analog I/O Modules
GEH-6855_Vol_II System Guide 97
Public Information