Fuji Electric Faldic-a Series, User Manual

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MHT258a (Engl.) 5-26
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Related items
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Detecting direction
+OT signal is detected when the motor rotates toward positive direction. Positive direction is the direction set by system para.80. The
motor rotates toward negative direction, and stops by det OT signal.
Afterwards, the motor cannot rotate in any direction.
System parameter 80
Para. Name Setting range Initial value Change
80 Rotating direction change 0: Positive direction/Forward rotation
1: Positive direction/Reverse rotation 0 Power
* Forward rotation : Counter-clockwise when viewed from a point facing the shaft extension of motor
・
+OT detection (38), -OT detection (39)
The detection speed take precedence because the amplifier detects this signal at the moving direction end of mechanical equipment
system. The amplifier sends the detection result to the host controller by the output signal, +OT detection or -OT detection signal. If the
host controller is equipped with OT input, OT signal is directly sent to the host controller, in general.
・
OT detection (20)
The OT detection (20) is a control output signal and turns on when the control input +OT(7) or –OT(8) is off, or when the soft OT of system
parameter 75 to 77 is detected.
System parameter 75 to 77
Para. Name Setting range Initial value Change
75 Soft OT valid/invalid 0: Invalid, 1: Valid 0 Power
76 + Soft OT detection position 0 to
±
79,999,999 (in increments of 1) 79,999,999 Always
77 - Soft OT detection position 0 to
±
79,999,999 (in increments of 1) -79,999,999 Always
APS30 APS30 APS30 APS30
PWR
PWR PWR
PWR
ALM ALM ALM ALM
ＳＸ ＳＸ ＳＸ ＳＸ
SCPU32 SCPU32 SCPU32 SCPU32
LOADER LOADER LOADER LOADER
RUN RUN RUN RUN
TERM TERM TERM TERM
SLV SLV SLV SLV
STOP STOP STOP STOP
CPU CPU CPU CPU
No. No. No. No.
ONL
ONL ONL
ONL
ERR ERR ERR ERR
RUN
RUN RUN
RUN
ALM
ALM ALM ALM
BAT
BAT BAT
BAT
O N L 0 1 2 3 4 5 6 7
O N L 0 1 2 3 4 5 6 7 O N L 0 1 2 3 4 5 6 7
O N L 0 1 2 3 4 5 6 7
E R R 8 9 1 0 1 1 1 2 1 3 1 4 1 5
E R R 8 9 1 0 1 1 1 2 1 3 1 4 1 5 E R R 8 9 1 0 1 1 1 2 1 3 1 4 1 5
E R R 8 9 1 0 1 1 1 2 1 3 1 4 1 5
O N L C H 1
O N L C H 1 O N L C H 1
O N L C H 1
E R R C H 2 E R R C H 2 E R R C H 2 E R R C H 2
E M G + O T ‑ O T E M G + O T ‑ O T E M G + O T ‑ O T E M G + O T ‑ O T
2 0
2 0 2 0
2 0
1 11 1
B / A B / A B / A B / A
HP2 HP2 HP2 HP2
O N L
O N L O N L
O N L
E R R
E R R E R R
E R R
PE1 PE1 PE1 PE1
PH PH PH PH
PL PL PL PL
DA
DA DA
DA
C H C H C H C H
N o .
N o . N o .
N o .
SCPU32 SCPU32 SCPU32 SCPU32
LOADER LOADER LOADER LOADER
RUN RUN RUN RUN
TERM TERM TERM TERM
SLV SLV SLV SLV
STOP STOP STOP STOP
CPU CPU CPU CPU
No. No. No. No.
ONL
ONL ONL
ONL
ERR ERR ERR ERR
RUN
RUN RUN
RUN
ALM
ALM ALM ALM
BAT
BAT BAT
BAT
O N L 0 1 2 3 4 5 6 7
O N L 0 1 2 3 4 5 6 7 O N L 0 1 2 3 4 5 6 7
O N L 0 1 2 3 4 5 6 7
E R R 8 9 1 0 1 1 1 2 1 3 1 4 1 5
E R R 8 9 1 0 1 1 1 2 1 3 1 4 1 5 E R R 8 9 1 0 1 1 1 2 1 3 1 4 1 5
E R R 8 9 1 0 1 1 1 2 1 3 1 4 1 5
K80791234
K80791234 K80791234
K80791234
L1 L1 L1 L1
L2 L2 L2 L2
L3 L3 L3 L3
DB
DB DB
DB
P1
P1 P1
P1
N NN N
P+
P+ P+
P+
U UU U
V VV V
W WW W
CHARGE CHARGE CHARGE CHARGE
FALDIC FALDIC FALDIC FALDIC
SHIFT SHIFT SHIFT SHIFT
ENT ENT ENT ENT
RYS20 1 S3-VVS RYS20 1 S3-VVS RYS20 1 S3-VVS RYS20 1 S3-VVS
MODE MODE MODE MODE
ESC ESC ESC ESC
K80791234
K80791234 K80791234
K80791234
L1 L1 L1 L1
L2 L2 L2 L2
L3 L3 L3 L3
DB
DB DB
DB
P1
P1 P1
P1
N NN N
P+
P+ P+
P+
U UU U
V VV V
W WW W
CHARGE CHARGE CHARGE CHARGE
FALDIC FALDIC FALDIC FALDIC
SHIFT SHIFT SHIFT SHIFT
ENT ENT ENT ENT
RYS20 1 S3-VVS RYS20 1 S3-VVS RYS20 1 S3-VVS RYS20 1 S3-VVS
MODE MODE MODE MODE
ESC ESC ESC ESC
+OT detection (38)
-OT detection (39)
+OT(7)
-OT(8)