11-1
Seiko Epson Corporation
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
11.
Supply Voltage Detector (SVD3)
11.1.
Overview
SVD3 is a supply voltage detector to monitor the VDD voltage, or an external voltage detection input
pin. The main features are listed below.
Power supply voltage to be detected:
Selectable from VDD and external power sources (EXSVD0,
EXSVD1)
Detectable voltage level:
Selectable from among 32 levels (max.)
(Note: See the table below.)
Detection results:
- Can be read whether the power supply voltage is lower than
the detection voltage level or not.
- Can generate an interrupt or a reset when low power supply
voltage is detected.
Interrupt:
1 system (Low power supply voltage detection interrupt)
Supports intermittent operations:
- Three detection cycles are selectable.
- Low power supply voltage detection count function to
generate an interrupt/reset when low power supply voltage is
successively detected the number of times specified.
- Continuous operation is also possible.
Figure 11.1.1 shows the configuration of SVD3.
Table 11.1.1 SVD3 Configuration of S1C31D50
Item
S1C31D50
Power supply voltage to be detected
VDD and two externally input voltages (EXSVD0, EXSVD1)
Detectable voltage level
VDD: 28 levels (1.8 to 5.0 V)/external voltage: 32 levels (1.2 to 5.0 V)
Figure 11.1.1 SVD3 Configuration
SVDMD[1:0]
Sampling
timing
generator
Voltage
comparator
circuit
Interrupt/reset
control circuit
Detection
result
counter
External
voltage
selector
MODEN
SVDC[4:0]
VDSEL
EXSEL
SVDSC[1:0]
SVDIE
SVDIF
SVDDT
SVDRE[3:0]
CLKSRC[1:0]
CLKDIV[2:0]
Clock
generator
DBRUN
V
DD
EXSVD
0
EXSVD
1
To system reset circuit
To CPU core
Int
er
na
l dat
a b
us
SVD3
CLK_SVD3
Summary of Contents for S1C31D50
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