Epson S1C31D50, Technical Instructions

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10-8
Seiko Epson Corporation
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
10.6. Control Registers
RTCA Control Register (Low Byte)
Register name Bit Bit name Initial Reset R/W Remarks
RTCACTLL 7 – 0 – R –
6 RTCBSY 0 H0 R
5 RTCHLD 0 H0 R/W Cleared by setting the
RTCACTLL.RTCRST bit to 1.
4 RTC24H 0 H0 R/W –
3 – 0 – R
2 RTCADJ 0 H0 R/W Cleared by setting the
RTCACTLL.RTCRST bit to 1.
1 RTCRST 0 H0 R/W –
0 RTCRUN 0 H0 R/W
Bit 7 Reserved
Bit 6 RTCBSY
This bit indicates whether the counter is performing count-up operation or not.
1 (R): In count-up operation
0 (R): Idle (ready to rewrite real-time clock counter)
This bit goes 1 when performing 1-second count-up, +1 second correction, or 30-second
correction. It retains 1 for 1/256 second and then reverts to 0.
Bit 5 RTCHLD
This bit halts the count-up operation of the real-time clock counter.
1 (R/W): Halt real-time clock counter count-up operation
0 (R/W): Normal operation
Writing 1 to this bit halts the count-up operation of the real-time clock counter, this
makes it possible to read the counter value correctly without changing the counter. Write
0 to this bit to resume count- up operation immediately after the counter has been read.
Depending on these operation timings, the +1 second correction may be executed after
the count-up operation resumes. For more information on the +1 second correction, refer
to “Real -Time Clock Counter Operations. ”
Note:
When the RTCACTLH.RTCTRMBSY bit = 1, the RTCACTLL.RTCHLD bit cannot be rewritten to
1 (as fixed at 0).
Bit 4 RTC24H
This bit sets the hour counter to 24H mode or 12H mode.
1 (R/W): 24H mode
0 (R/W): 12H mode
This selection changes the count range of the hour counter. Note, however, that the
counter value is not updated automatically, therefore, it must be programmed again.
Note:
Be sure to avoid writing to this bit when the RTCACTLL.RTCRUN bit = 1.
Bit 3 Reserved