12.2.3.3
Function block
A1A2_DC
QB_OP
QB_CL
S1QC1_OP
S1QC1_CL
S2QC2_OP
S2QC2_CL
S1DC_OP
S2DC_OP
VPS1_DC
VPS2_DC
EXDU_ES
EXDU_BB
QBCL_EX1
QBCL_EX2
QBOP_EX1
QBOP_EX2
QBOP_EX3
QBOPREL
QBOPITL
QBCLREL
QBCLITL
DCOPTR
DCCLTR
VPDCTR
IEC09000067_1_en.vsd
IEC09000067 V1 EN
Figure 132:
A1A2_DC function block
12.2.3.4
Logic diagram
QB_OP
QB_CL
S1QC1_CL
en04000544.vsd
=1
=1
=1
VPQB
VPDCTR
DCOPTR
DCCLTR
S1QC1_OP
S2QC2_OP
S2QC2_CL
VPS1QC1
VPS2QC2
&
>1
&
&
1
QBOPITL
QBOPREL
VPS1QC1
VPS2QC2
VPS1_DC
S1QC1_OP
S2QC2_OP
S1DC_OP
EXDU_ES
EXDU_BB
QBOP_EX1
VPS1QC1
VPS2QC2
VPS2_DC
S1QC1_OP
S2QC2_OP
S2DC_OP
EXDU_ES
EXDU_BB
QBOP_EX2
VPS1QC1
VPS2QC2
S1QC1_CL
S2QC2_CL
EXDU_ES
QBOP_EX3
A1A2_DC
IEC04000544 V1 EN
12.2.3.5
Signals
Table 203:
A1A2_DC Input signals
Name
Type
Default
Description
QB_OP
BOOLEAN
0
QB is in open position
QB_CL
BOOLEAN
0
QB is in closed position
S1QC1_OP
BOOLEAN
0
QC1 on bus section 1 is in open position
Table continues on next page
1MRK 504 135-UEN A
Section 12
Control
281
Technical manual
Summary of Contents for ret650
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