Viavi T-BERD MTS 5800, Руководство по началу работы

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Appendix A Specifications
MSAM specifications
T-BERD/MTS/SC Getting Started Guide
March 2018 22046537, Rev. 016 Page 183
DTE emulation
Table 56 lists specifications for V.24 testing in DTE emulation mode.
DCE emulation
Table 57 lists specifications for V.24 testing in DCE emulation mode.
DSR Data Set Ready
RT Receiver Signal Element Timing
RLSD Receiver Line Signal Detect
RL Remote Loopback
TM Test Mode
Table 56
V.24
DTE emulation specifications
Specification Description
User controllable leads – RTS
– DTR
– LL
– RL
Sync Timing Mode
Rx Timing Sources
– Interface (from the RT circuit)
– Interface Recovered
Sync Timing Mode
Tx Timing Sources
– Interface (from the RT circuit)
– Interface (from the ST circuit)
– Interface Recovered
– Internal Synthesizer
– External Clock
Table 57
V.24
DCE emulation specifications
Specification Description
User controllable leads – RLSD
– DSR
– CTS
– RI
– TM
Table 55 V.24 circuits (Continued)
Supported Circuits