Motorola MPC8260 PowerQUICC II, Руководство пользователя

Страница: 530 / 1006

18-6 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA
Part IV. Communications Processor Module
Peripheral to/from memory features include the following:
¥ External DREQ, DACK, and DONE signals for each channel simpliÞes the
peripheral interface for memory-to/from-peripheral transfers
¥ Supports 1-, 2-, 4-, and 8-byte peripheral port sizes
¥ Supports standard 60x burst accesses (four consecutive 64-bit data phases) to/from
peripherals
18.5 IDMA Transfers
The IDMA channel transfers data from a source to a destination using an intermediate
transfer buffer (of programmable size) in the dual-port RAM. An efÞcient data-packing
algorithm bursts data through the IDMA transfer buffer to minimize the bus cycles needed
for the transfer. In single-address peripheral transfers, however, data is transferred directly
between memory and a peripheral device without using the IDMA transfer buffer.
Unaligned data is transferred in single accesses until alignment is achieved. Then, burst
transactions are used (if allowed by the user) to transfer the bulk of the data buffer. Single
accesses are used again for any remaining non-burstable data at the end of the transfer.
18.5.1 Memory-to-Memory Transfers
For memory-to-memory transfers, the IDMA Þrst Þlls the IDMA transfer buffer in the dual-
port RAM by initiating read accesses on the source bus. It then empties the data from the
internal transfer buffer to the destination bus by initiating write accesses. The transfer sizes
for the source and destination buses are programmed in the IDMA parameter RAM.
For the DMA to generate bursts on the 60x bus, the address boundaries of each burst
transfer must be 32-byte aligned. If the transfer does not start on a burst boundary, the
IDMA controller transfers the end-of-burst (EOB) data (1Ð31 bytes) in non-burst
transactions on the source bus and on the destination bus until reaching the next boundary.
When alignment is achieved, subsequent data is bursted until the remainder of the data in
the buffer is less than a burst size (32 bytes). The remaining data is transferred using non-
burst transactions.
Data transfers use the parameters described in Table 18-3.