MOTOROLA
Chapter 24. SCC Ethernet Mode
24-5
Part IV. Communications Processor Module
Figure 24-3. Connecting the MPC8260 to Ethernet
The EEST has similar names for its connection to the above seven MPC8260 signals. The
EEST also provides a loopback input so the MPC8260 can perform external loopback
testing, which can be controlled by any available MPC8260 parallel I/O signal. The passive
components needed to connect to AUI or twisted-pair media are external to the EEST. The
MC68160 documentation describes EEST connection circuits.
The MPC8260 uses SDMA channels to store bytes received after the start frame delimiter
in system memory. When sending, provide the destination address, source address, type/
length Þeld, and the transmit data. To meet minimum frame requirements, the MPC8260
pads frames with fewer than 46 bytes in the data Þeld and appends the FCS to the frame.
24.4 SCC Ethernet Channel Frame Transmission
The Ethernet transmitter works with almost no core intervention. When the core enables the
transmitter, the SCC polls the Þrst TxBD in the table every 128 serial clocks. Setting
TODR[TOD] lets the next frame be sent without waiting for the next poll.
To begin transmission, the SCC in Ethernet mode (called the Ethernet controller) fetches
data from the buffer, asserts TENA to the EEST, and starts sending the preamble sequence,
the start frame delimiter, and frame information. If the line is busy, it waits for carrier sense
to remain inactive for 6.0 µs, at which point it waits an additional 3.6 µs before it starts
sending (9.6 µs after carrier sense originally became inactive).
If a collision occurs during frame transmission, the Ethernet controller follows a speciÞed
backoff procedure and tries to retransmit the frame until the retry limit threshold is reached.
MPC8260
EEST
MC68160
TXD
TENA (RTS)
TCLK (CLKx)
RXD
RENA (CD)
RCLK (CLKx)
CLSN (CTS)
Parallel I/O
Tx
TENA
TCLK
Rx
RENA
RCLK
CLSN
Loop
Passive
Passive
Twisted
Pair
AUI
Preamble
Start Frame
Data
Delimiter
Destination
Address
Type/
Length
Source
Address
Frame Check
Sequence
7 Bytes
1 Byte
6 Bytes
6 Bytes
2 Bytes
46–1500 Bytes
4 Bytes
Stored in Receive Buffer
RJ-45
D-15
Stored in Transmit Buffer
SCC
NOTE: Short Tx frames are padded automatically by the MPC8260.
(Pads)
Содержание MPC8260 PowerQUICC II
Страница 1: ...MPC8260UM D 4 1999 Rev 0 MPC8260 PowerQUICC II UserÕs Manual ª ª ...
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Страница 88: ...1 18 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA Part I Overview ...
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Страница 138: ...Part II iv MPC8260 PowerQUICC II UserÕs Manual MOTOROLA Part II Configuration and Reset ...
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Страница 202: ...Part III vi MPC8260 PowerQUICC II UserÕs Manual MOTOROLA Part III The Hardware Interface ...
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Страница 430: ...Part IV viii MOTOROLA Part IV Communications Processor Module ...
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Страница 1002: ...Index 22 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA INDEX ...
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