General Lists
Name
Description
Statistics.StartFc I
Demand-I
State of the module input: Start of the Statistics of the Current Demand
Logics.LE1.Gate Out
Signal: Output of the logic gate
Logics.LE1.Timer Out
Signal: Timer Output
Logics.LE1.Out
Signal: Latched Output (Q)
Logics.LE1.Out inverted
Signal: Negated Latched Output (Q NOT)
Logics.LE1.Gate In1-I
State of the module input: Assignment of the Input Signal
Logics.LE1.Gate In2-I
State of the module input: Assignment of the Input Signal
Logics.LE1.Gate In3-I
State of the module input: Assignment of the Input Signal
Logics.LE1.Gate In4-I
State of the module input: Assignment of the Input Signal
Logics.LE1.Reset Latch-I State of the module input: Reset Signal for the Latching
Logics.LE2.Gate Out
Signal: Output of the logic gate
Logics.LE2.Timer Out
Signal: Timer Output
Logics.LE2.Out
Signal: Latched Output (Q)
Logics.LE2.Out inverted
Signal: Negated Latched Output (Q NOT)
Logics.LE2.Gate In1-I
State of the module input: Assignment of the Input Signal
Logics.LE2.Gate In2-I
State of the module input: Assignment of the Input Signal
Logics.LE2.Gate In3-I
State of the module input: Assignment of the Input Signal
Logics.LE2.Gate In4-I
State of the module input: Assignment of the Input Signal
Logics.LE2.Reset Latch-I State of the module input: Reset Signal for the Latching
Logics.LE3.Gate Out
Signal: Output of the logic gate
Logics.LE3.Timer Out
Signal: Timer Output
Logics.LE3.Out
Signal: Latched Output (Q)
Logics.LE3.Out inverted
Signal: Negated Latched Output (Q NOT)
Logics.LE3.Gate In1-I
State of the module input: Assignment of the Input Signal
Logics.LE3.Gate In2-I
State of the module input: Assignment of the Input Signal
Logics.LE3.Gate In3-I
State of the module input: Assignment of the Input Signal
Logics.LE3.Gate In4-I
State of the module input: Assignment of the Input Signal
Logics.LE3.Reset Latch-I State of the module input: Reset Signal for the Latching
Logics.LE4.Gate Out
Signal: Output of the logic gate
Logics.LE4.Timer Out
Signal: Timer Output
Logics.LE4.Out
Signal: Latched Output (Q)
Logics.LE4.Out inverted
Signal: Negated Latched Output (Q NOT)
Logics.LE4.Gate In1-I
State of the module input: Assignment of the Input Signal
Logics.LE4.Gate In2-I
State of the module input: Assignment of the Input Signal
Logics.LE4.Gate In3-I
State of the module input: Assignment of the Input Signal
Logics.LE4.Gate In4-I
State of the module input: Assignment of the Input Signal
Logics.LE4.Reset Latch-I State of the module input: Reset Signal for the Latching
Logics.LE5.Gate Out
Signal: Output of the logic gate
Logics.LE5.Timer Out
Signal: Timer Output
674
MRI4
DOK-HB-MRI4-2E
Summary of Contents for highprotec MRI4
Page 1: ...Manual Feeder Protection MRI4 Software Version 3 4 a DOK HB MRI4 2E Revision C English...
Page 43: ...Installation and Connection 43 MRI4 DOK HB MRI4 2E...
Page 46: ...Installation and Connection Ensure the correct tightening torques 46 MRI4 DOK HB MRI4 2E...
Page 69: ...Navigation Operation Navigation Operation 69 MRI4 DOK HB MRI4 2E 1 2 3 5 7 6 8 10 9...
Page 353: ...Device Parameters 353 MRI4 DOK HB MRI4 2E...
Page 373: ...373 MRI4 DOK HB MRI4 2E...