General Lists
Name
Description
Logics.LE5.Out
Signal: Latched Output (Q)
Logics.LE5.Out inverted
Signal: Negated Latched Output (Q NOT)
Logics.LE5.Gate In1-I
State of the module input: Assignment of the Input Signal
Logics.LE5.Gate In2-I
State of the module input: Assignment of the Input Signal
Logics.LE5.Gate In3-I
State of the module input: Assignment of the Input Signal
Logics.LE5.Gate In4-I
State of the module input: Assignment of the Input Signal
Logics.LE5.Reset Latch-I State of the module input: Reset Signal for the Latching
Logics.LE6.Gate Out
Signal: Output of the logic gate
Logics.LE6.Timer Out
Signal: Timer Output
Logics.LE6.Out
Signal: Latched Output (Q)
Logics.LE6.Out inverted
Signal: Negated Latched Output (Q NOT)
Logics.LE6.Gate In1-I
State of the module input: Assignment of the Input Signal
Logics.LE6.Gate In2-I
State of the module input: Assignment of the Input Signal
Logics.LE6.Gate In3-I
State of the module input: Assignment of the Input Signal
Logics.LE6.Gate In4-I
State of the module input: Assignment of the Input Signal
Logics.LE6.Reset Latch-I State of the module input: Reset Signal for the Latching
Logics.LE7.Gate Out
Signal: Output of the logic gate
Logics.LE7.Timer Out
Signal: Timer Output
Logics.LE7.Out
Signal: Latched Output (Q)
Logics.LE7.Out inverted
Signal: Negated Latched Output (Q NOT)
Logics.LE7.Gate In1-I
State of the module input: Assignment of the Input Signal
Logics.LE7.Gate In2-I
State of the module input: Assignment of the Input Signal
Logics.LE7.Gate In3-I
State of the module input: Assignment of the Input Signal
Logics.LE7.Gate In4-I
State of the module input: Assignment of the Input Signal
Logics.LE7.Reset Latch-I State of the module input: Reset Signal for the Latching
Logics.LE8.Gate Out
Signal: Output of the logic gate
Logics.LE8.Timer Out
Signal: Timer Output
Logics.LE8.Out
Signal: Latched Output (Q)
Logics.LE8.Out inverted
Signal: Negated Latched Output (Q NOT)
Logics.LE8.Gate In1-I
State of the module input: Assignment of the Input Signal
Logics.LE8.Gate In2-I
State of the module input: Assignment of the Input Signal
Logics.LE8.Gate In3-I
State of the module input: Assignment of the Input Signal
Logics.LE8.Gate In4-I
State of the module input: Assignment of the Input Signal
Logics.LE8.Reset Latch-I State of the module input: Reset Signal for the Latching
Logics.LE9.Gate Out
Signal: Output of the logic gate
Logics.LE9.Timer Out
Signal: Timer Output
Logics.LE9.Out
Signal: Latched Output (Q)
Logics.LE9.Out inverted
Signal: Negated Latched Output (Q NOT)
Logics.LE9.Gate In1-I
State of the module input: Assignment of the Input Signal
Logics.LE9.Gate In2-I
State of the module input: Assignment of the Input Signal
675
MRI4
DOK-HB-MRI4-2E
Summary of Contents for highprotec MRI4
Page 1: ...Manual Feeder Protection MRI4 Software Version 3 4 a DOK HB MRI4 2E Revision C English...
Page 43: ...Installation and Connection 43 MRI4 DOK HB MRI4 2E...
Page 46: ...Installation and Connection Ensure the correct tightening torques 46 MRI4 DOK HB MRI4 2E...
Page 69: ...Navigation Operation Navigation Operation 69 MRI4 DOK HB MRI4 2E 1 2 3 5 7 6 8 10 9...
Page 353: ...Device Parameters 353 MRI4 DOK HB MRI4 2E...
Page 373: ...373 MRI4 DOK HB MRI4 2E...