VIPA System 200V IM Series, Manual

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Manual VIPA System 200V
Chapter 3 Profibus DP
HB97E - IM - Rev. 06/29 3-93
This example shows a communication between a CPU 21x (here CPU 214-
1BA02) with IM 208 DP master and a CPU 21xDP (here CPU 214-2BP02).
Via this system, counter values should be exchanged via Profibus and
monitored at the output module of the respective partner.
The CPU 214 has to count from FFh to 00h and transfer the counter value
cyclically into the output area of the Profibus master. The master sends this
value to the DP slave of the CPU 214DP.
The received value shall be stored in the input periphery area of the CPU
and monitored via the backplane bus at the output module (at address 0).
Vice versa, the CPU 214DP has to count from 00h to FFh, store the value
in the output area of the CPU slave and transfer it to the master via
Profibus.
This value is monitored at the output module of the CPU 214 (address 0).
CPU 214DP
DO 8
C2
C1
Counter C2:
00h ... FFh
Addr.:3
Slave
CPU 214
DO 8
C1
C2
Counter C1:
FFh ... 00h
C1
C2
Master
IM208DP
Addr.:2
CPU 214 and DP master
Counter value: MB 0 (FFh ... 00h)
Profibus address: 2
Input area:
Address 10 Length: 2 Byte
Output area: Address 20 Length: 2 Byte
CPU 214DP
Counter value: MB 0 (00h...FFh)
Input area:
Address 30 Length: 2 Byte
Output area: Address 40 Length: 2 Byte
Parameter data: Address 800 Length: 24 Byte (fix)
Diagnostic data: Address 900 Length: 6 Byte (fix)
Status data: Address 1020 Length: 2 Byte (fix)
Profibus address: 3
Example 2
Problem
Problem in detail
Project data