4-220
PID Control Setting
PID control block diagram.
The following figure shows the PID control block diagram.
×1
-1
10-09
10-24
10-03
=
xx0xb
10-03
=
xx1xb
(Bias)
+
+
(PID output gam)
PID Output
±200% Limit
+
10-03
=
0xxxb
10-03
=
1xxxb
10-25
=0
10-25
=1
+109%
+109%
-109%
+
+
PID=0N
Frequency
Reference
(Fref)
PID=OFF
10-04
10-07
10-05
10-06
10-10
+
Target
Value
Feedback
Value
(Feedback
Gain)
10-03
=
x0xxb
10-03
=
x1xxb
(D)
+
+
+
-
PID Input
(Deviation)
(P)
(I)
(D)
100%
-
100%
10-14
(I-Limit)
+
+
+
Integr
a
l
Reset
(using Multi-function
Digital Input)
10-03
=
x0xxb
10-03
=
x1xxb
100%
-100%
(PID Limit)
10-23
(Primary
delay)
PID=OFF
1.
10-03
=0 (PID Disabled)
2. during JOG mode
3. multi - function digital input
(
03-00
–
03-07
setting = 29)
G23-04
10-01
10-07
Freq Command (00-05)
10-00
=
6
AI1
AI2
Pulse Input
10-00
=
1
10-00
=
2
10-00
=
3
10-02
10-00
=
4
Figure 4.4.81 PID control block diagram
Pulse Input
10-00=3