Tadpole SPARCbook 3 series, Reference Manual

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Memory Map and Interrupts
3-13
NCR89C105 SLAVIO Configuration Control
Modem Register The NCR89C105 can directly support the RI (Ring Indicate) bit output of
a modem, when it is configured for modem use. This mode uses the
MSI_IRQ_ input pin for sensing modem RI. When the Modem mode and
the Modem interrupt are enabled in the Configuration Register, the
NCR89C105 generates an SBus level 5 interrupt on RI transitions.
A system reset clears Bits 1 and 0 to 0. The input bit 2 is controlled by the
MSI_IRQ_ chip pin. Bits 7:3 are unaffected by resets or writes and always
read as 0.
Bits 7:3 Reserved - always read 0.
Bit 2 R - RI pin. This pin directly reflects the state of the
MSI_IRQ_ pin (which is used for modem RI when in
Modem mode). If this pin is low, then this bit is 0.
Bit 1 E - Edge Select. This bit selects which RI edge causes an
interrupt. When this bit is cleared to 0, a 1 to 0 transition on
the MSI_IRQ_ pin causes an interrupt. Toggling this bit
after the first edge of an RI pulse is received, allows
interrupts to be obtained on both edges of RI.
Bit 0 I - Modem RI Interrupt. This bit is set to 1 if a modem RI
interrupt is pending. When this happens, an SBus level 5
interrupt is set. Writing a 0 to this bit clears the interrupt.
Figure 3-7 Modem Register
7 6 5 4 3 2 1 0
E I R
S3GX_TRMBook Page 13 Friday, September 19, 1997 11:39 am