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11-10
Display Interface
Power 9100 User Interface Controller
Bit 25
Reserved
Bit 24
Drive Load 2
0 = Normal drive load
1 = Double drive load
Bit 23
Clocking – should be zero
Bits 22:20
Shift control 0
Bits 19:17
Shift control 1
bits 16:14
Shift control 2
The four shift control fields are used to define the resolution,
in bytes, of the horzontal display.
To determine which values to place in these feilds: first
determine the number of pixels in a horizontal scan line;
next, multiply this by the number of bytes per pixel (set in
Pixel Size field); finaly, set the shift control fields so that the
total adds up to the number of bytes per scan line. There are
many possible combinations of which four examples are
shown below:
Bits 13:11
Endian swapping for frame buffer access– set as follows:
Use 000 for 8 bits per pixel mode
Use 010 for 16 bits per pixel mode
Use 110 for 24 and 32 bits per pixel modes
Bit 10
Buffer select for read
0 = buffer 0
1 = buffer 1
Bit 9
Buffer select for write
0 = buffer 0
1 = buffer 1
Horizontal
Resolution
Bits per
Pixel
Horizontal
Bytes
Shift 0 Shift 1 Shift 2 Shift 3
640
8
64
101
011
000
00
011
000
101
00
1280
24
3840
110
101
100
10
111
100
101
01
Table 11-4 Example Horizontal Resolution Settings
S3GX_TRMBook Page 10 Friday, September 19, 1997 11:39 am
Summary of Contents for SPARCbook 3 series
Page 8: ...viii S3GX_TRMBook Page viii Friday September 19 1997 11 39 am...
Page 44: ...2 16 The SPARC CPU SBus Controller S3GX_TRMBook Page 16 Friday September 19 1997 11 39 am...
Page 76: ...5 8 SCSI Controller DMA Support S3GX_TRMBook Page 8 Friday September 19 1997 11 39 am...
Page 146: ...9 28 MODEM Class 2 Fax Command Set S3GX_TRMBook Page 28 Friday September 19 1997 11 39 am...
Page 180: ...11 30 Display Interface RAMDAC S3GX_TRMBook Page 30 Friday September 19 1997 11 39 am...
Page 216: ...Index vi S3GX_TRMBook Page vi Friday September 19 1997 11 39 am...