Tadpole SPARCbook 3 series, Reference Manual

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Architecture Overview
Graphics and Video Subsystem
1.9 Graphics and Video Subsystem
The Graphics and Video Subsystem comprises the Weitek P9100 User
Interface Controller, an IBM RGB528 palette DAC (RAMDAC), and a
framebuffer provided by a 2MByte array of video RAM (VRAM) devices.
All display interface configuration is carried out in software. There are no
link adjustments.
The display interface supports the following display resolutions:
• 640 x 480 at 8, 16 or 24 bits per pixel
• 1024 x 768 at 8 or 16 bits per pixel
• 1152 x 900 at 8 bits per pixel
• 1280 x 1024 at 8 bits per pixel
1.9.1 Graphics Controller
The P9100 User Interface Controller provides the graphics control
function. This device provides a 32-bit host interface and the following
features:
• 32-bit VRAM interface and control signals
• RAMDAC interface and control signals
• Video timing control (up to 165MHz)
• 2D Graphics Accelerator
• Supports X window drawing mode
• Powerful graphics primitives
The Weitek Power 9100 User Interface Controller provides programmable
display resolutions, supporting displays from 640 x 480 up to 1280 x 1024
pixels.
1.9.2 VRAM
The SPARCbook 3 has a 2Mbyte framebuffer comprising eight 256K x 8
devices. The VRAM is dual ported to provide a random access port for
P9100 and a serial read-only port for the RAMDAC. The random access
port is used by the P9100 and host to read and write picture information.
The serial port is used to output pixel information to the RAMDAC. The
RAMDAC provides timing signals for the serial data port of the
framebuffer.
1.9.3 RAMDAC, Panel Driver and Video Clock Generator
The RGB528 combines a video clock generator, RAMDAC and flat panel
control circuitry. The primary mode of operation supports the internal TFT
panel and provides a display of 800 x 600 pixels (640x480 on some models)
S3GX_TRMBook Page 12 Friday, September 19, 1997 11:39 am