NXP Semiconductors MCF5253, Reference Manual, Page: 29 / 648

MCF5253 Reference Manual, Rev. 1
Freescale Semiconductor xxix
debug mode (BDM), and real-time debug support. The memory map, register
definitions, and Debug support operation are provided.
Chapter 21, “IEEE 1149.1 Test Access Port (JTAG) ”: This chapter discussed the JTAG signal
descriptions, TAP controller, memory map, register definitions, and how to
disable the standard operation.
Chapter 22, “USB, ATA DMA, and Clock Integration Module ”: This chapter includes the memory map,
register definitions, and functional description of the integration module.
Chapter 23, “Advanced Technology Attachment Controller (ATA) ”: This chapter discusses the modes of
operation, signal descriptions, memory map, register definitions, timing
parameters and functional description of the ATA interface.
Chapter 24, “Universal Serial Bus Interface ”: This chapter describes the universal serial bus (USB)
interface of the MCF5253. The content includes the operation, signal descriptions,
host data structures, and host operations. Also provided is the device operational
model and deviations from the host mode of operation.
Chapter 25, “FlexCAN Module ”: This chapter discusses the modes of operation, signals, memory map,
register definitions, and the functional and initialization sequence of the FlexCAN
controller.
Chapter 26, “Real-Time Clock ”: This chapter provides the external signal descriptions, memory map,
register definitions, and functional descriptions of the Real-Time Clock.
Revision History
The table below summarizes revisions to this document since the previous release (Rev. 0).
Suggested Reading
Provide the full title, name of author, edition, and year of publication for any book you suggest as a
supplement to this one.
PowerPC AIX Version 4 Application Binary Interface, 1st ed., April 1992.
The KornShell Command and Programming Language , Morris Bolsky and David Korn (Prentice Hall:
1989).
Revision History
Chapter Substantive Changes
Chapter 13, “IDE and Flash
Media Interface ”
In Section “Send Command to Card (Receive Multiple Data Blocks and Status)” changed first
“read FLASHMEDIADATA2” to “write FLASHMEDIADATA2”
Chapter 17, “Audio Interface
Module (AIM) ”
Corrected inconsistent register locations
Chapter 24, “Universal
Serial Bus Interface ”
Corrected bit description of HCSPARAMS[N_TT and P_TT] from “This field is always 1” to “This
field is always 0”