Universal Serial Bus Interface
MCF5253 Reference Manual, Rev. 1
24-114
Freescale Semiconductor
24.9.12.3.6
Complete-Split for Scheduling Boundary Cases 2a, 2b
Boundary cases 2a and 2b (INs only) (see
) require that the host controller use the transaction
state context of the previous siTD to finish the split transaction.
enumerates the transaction
state fields.
NOTE
TP and T-count are used only for Host to Device (OUT) endpoints.
If the software has budgeted the schedule of this data stream with a frame wrap case, then it must initialize
the siTD[Back Pointer] field to reference a valid siTD and have the T bit in the siTD[Back Pointer] field
cleared. Otherwise, the software must set the T bit in siTD[Back Pointer]. The host controller's rules for
interpreting when to use the siTD[Back Pointer] field are listed below. These rules apply only when the
siTD's Active bit is a one and the SplitXState is Do Complete Split.
•
When cMicroFrameBit is a 0x1 and the siTD
X
[Back Pointer] T-bit is zero, or
•
If cMicroFrameBit is a 0x2 and siTDX[S-mask[0]] is zero
When either of these conditions apply, then the host controller must use the transaction state from siTD
X-1
.
In order to access siTD
X-1
, the host controller reads on-chip the siTD referenced from siTD
X
[Back
Pointer].
The host controller must save the entire state from siTD
X
while processing siTD
X-1
. This is to
accommodate for case 2b processing. The host controller must not recursively walk the list of siTD[Back
Pointers].
If siTD
X-1
is active (Active bit is set and SplitXStat is Do Complete Split), then both Test A and Test B are
applied as described above. If these criteria to execute a complete-split are met, the host controller executes
the complete split and evaluates the results as described above. The transaction state (see
siTD
X-1
is appropriately advanced based on the results and written back to memory. If the resultant state
of siTD
X-1
's Active bit is a one, then the host controller returns to the context of siTD
X
, and follows its
next pointer to the next schedule item. No updates to siTD
X
are necessary.
If siTD
X-1
is active (Active bit is set and SplitXStat is Do Start Split), then the host controller must clear
the Active bit and set the Missed Micro-Frame status bit and the resultant status is written back to memory.
If siTD
X-1
's Active bit is cleared, (because it was cleared when the host controller first visited siTD
X-1
via
siTD
X
's back pointer, it transitioned to zero as a result of a detected error, or the results of siTD
X-1
's
complete-split transaction cleared it), then the host controller returns to the context of siTD
X
and
transitions its SplitXState to Do Start Split. The host controller then determines whether the case 2b start
split boundary condition exists (that is, if cMicroframeBit is 1 and siTD
X
[S-mask[0]] is 1). If this criterion
Table 24-70. Summary siTD Split Transaction State
Buffer State
Status
Execution Progress
Total Bytes To Transfer
P (page select)
Current Offset
TP (transaction position)
T-count (transaction count)
All bits in the status field
C-prog-mask
Summary of Contents for MCF5253
Page 1: ...Document Number MCF5253RM Rev 1 08 2008 MCF5253 Reference Manual...
Page 26: ...MCF5253 Reference Manual Rev 1 xxvi Freescale Semiconductor...
Page 32: ...MCF5253 Reference Manual Rev 1 xxxii Freescale Semiconductor...
Page 46: ...MCF5253 Introduction MCF5253 Reference Manual Rev 1 1 14 Freescale Semiconductor...
Page 62: ...Signal Description MCF5253 Reference Manual Rev 1 2 16 Freescale Semiconductor...
Page 98: ...Instruction Cache MCF5253 Reference Manual Rev 1 5 10 Freescale Semiconductor...
Page 104: ...Static RAM SRAM MCF5253 Reference Manual Rev 1 6 6 Freescale Semiconductor...
Page 128: ...Synchronous DRAM Controller Module MCF5253 Reference Manual Rev 1 7 24 Freescale Semiconductor...
Page 144: ...Bus Operation MCF5253 Reference Manual Rev 1 8 16 Freescale Semiconductor...
Page 176: ...System Integration Module SIM MCF5253 Reference Manual Rev 1 9 32 Freescale Semiconductor...
Page 198: ...Analog to Digital Converter ADC MCF5253 Reference Manual Rev 1 12 6 Freescale Semiconductor...
Page 246: ...DMA Controller MCF5253 Reference Manual Rev 1 14 18 Freescale Semiconductor...
Page 282: ...UART Modules MCF5253 Reference Manual Rev 1 15 36 Freescale Semiconductor...
Page 344: ...Audio Interface Module AIM MCF5253 Reference Manual Rev 1 17 46 Freescale Semiconductor...
Page 362: ...I2 C Modules MCF5253 Reference Manual Rev 1 18 18 Freescale Semiconductor...
Page 370: ...Boot ROM MCF5253 Reference Manual Rev 1 19 8 Freescale Semiconductor...
