NXP Semiconductors MCF5253, Reference Manual

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Audio Interface Module (AIM)
MCF5253 Reference Manual, Rev. 1
Freescale Semiconductor 17-9
.
Figure 17-4 illustrates the valid bits in the IIS3 and IIS4 (SCLK4) Configuration Registers and Table 17-5
provides the description of the bit fields.
.
Address MBAR2 + 0x14 (reset 0x0fc8) Access: User read/write
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
TXSOURCE
SELECT
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
CLOCKSEL
TX FIFO
CONTROL
TXSOURCE
SELECT
SIZE MODE
LRCK
FREQUENCY
LRCK
INVERT
SCLK
INVERT
W
Reset 0 0 0 0 1 1 1 1 1 1 0 0 1 0 0 0
Figure 17-3. IIS2 Configuration Registers (0x14)
Address MBAR2 + 0x18 (reset 0x0fc8) (IIS3config)
MBAR2 + 0x1C (reset 0x0fc8) (IIS4config(SCLK4))
Access: User read/write
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
W
Reset 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
CLOCKSEL SIZE MODE
LRCK
FREQUENCY
LRCK
INVERT
SCLK
INVERT
W
Reset 0 0 0 0 1 1 1 1 1 1 0 0 1 0 0 0
Figure 17-4. IIS3 and IIS4 (SCLK4) Configuration Registers (0x18, 0x1C)
Table 17-5. IIS Configuration Registers Field Descriptions
Field Description
EF/CFLG EF/CFLG insert. See note 16
0 Not active
1 Active
CFLG CFLG sample position. See note 16
0 Sample CFLG input 1 SCLK clock after incoming LRCK edge
1 Sample CFLG input 6 SCLK clocks before incoming LRCK edge