IDT 89HPES12T3G2, Preliminary User'S Manual

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Notes
PES12T3G2 User Manual 6 - 1 January 28, 2013
®
Chapter 6
Power Management
Introduction
Located in configuration space of each PCI-PCI bridge in the PES12T3G2 is a power management
capability structure. The power management capability structure associated with a PCI-PCI bridge of a
downstream port only affects that port. Entering the D3
Hot
state allows the link associated with the bridge to
enter the L1 state.
– The link associated with a port in the D3
Hot
state will attempt to transition into L1 link state irre-
spective of the link or power management state of any other switch port.
The power management capability structure associated with the upstream port (i.e., Port 0) affects the
entire device. When the upstream port enters a low power state and the PME_TO_Ack messages are
received, then the entire device is placed into a low power state. The PES12T3G2 supports the following
device power management states: D0 Uninitialized, D0 Active, D3
Hot
, and D3
Cold
.
A power management state transition diagram for the states supported by the PES12T3G2 is provided
in Figure 6.1 and described in Table 6.1. Transitioning a port’s power management state from D3
hot
to
D0
uninitialized
does not result in any logic being reset or re-initialization of register values. Thus, the default
value of the No Soft Reset (NOSOFTRST) bit in the PCI Power Management Control and Status (PMCSR)
register corresponds to the functional context being maintained in the D3
hot
state.
Figure 6.1 PES12T3G2 Power Management State Transition Diagram
D0
Uninitialized
D0
Active
D3
hot
Power-On Reset
D3
cold