IDT 89HPES12T3G2, Preliminary User'S Manual

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IDT Configuration Registers
PES12T3G2 User Manual 8 - 17 January 28, 2013
Notes
PMLIMITU - Prefetchable Memory Limit Upper Register (0x02C)
IOBASEU - I/O Base Upper Register (0x030)
IOLIMITU - I/O Limit Upper Register (0x032)
CAPPTR - Capabilities Pointer Register (0x034)
EROMBASE - Expansion ROM Base Address Register (0x038)
Bit
Field
Field
Name
Type Default
Value
Description
31:0 PMLIMITU RW 0x0 Prefetchable Memory Address Limit Upper. This field specifies
the upper 32-bits of PMLIMIT.
When the PMCAP field in the PMBASE register is cleared, this
field becomes read-only with a value of zero.
Bit
Field
Field
Name
Type Default
Value
Description
15:0 IOBASEU RW 0xFFFF I/O Address Base Upper. This field specifies the upper 16-bits of
IOBASE.
When the IOCAP field in the IOBASE register is cleared, this field
becomes read-only with a value of zero.
Bit
Field
Field
Name
Type Default
Value
Description
15:0 IOLIMITU RW 0x0 Prefetchable IO Limit Upper. This field specifies the upper 16-bits
of IOLIMIT.
When the IOCAP field in the IOBASE register is cleared, this field
becomes read-only with a value of zero.
Bit
Field
Field
Name
Type Default
Value
Description
7:0 CAPPTR RWL 0x40 Capabilities Pointer. This field specifies a pointer to the head of
the capabilities structure.
Bit
Field
Field
Name
Type Default
Value
Description
31:0 EROMBASE RO 0x0 Expansion ROM Base Address. The bridge does not implement
an expansion ROM. Thus, this field is hardwired to zero.