IDT 89HPES12T3G2, Preliminary User'S Manual

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IDT Hot-Plug and Hot-Swap
PES12T3G2 User Manual 7 - 5 January 28, 2013
Notes
GPEN is an alternate function of GPIO[7] and GPIO[7] will not be asserted when GPEN is asserted
unless it is configured to operate as an alternate function. Whenever a port signals a hot-plug event through
assertion of the GPEN signal, the corresponding port’s status bit in the General Purpose Event Status
(P0_GPESTS) register is set. A bit in the P0_GPESTS register can only be set if the corresponding port’s
hot plug controller is configured to signal hot-plug events using the general purpose event (GPEN) signal
assertion mechanism.
The hot-plug event signalling mechanism is the only thing that is affected when a port is configured to
use general purpose events instead of the PCIe defined hot-plug signalling mechanisms (i.e., INTx, MSI
and PME). Thus, the PCIe defined capability, status and mask bits defined in the PCIe slot capabilities,
status and control registers operate as normal and all other hot-plug functionality associated with the port
remains unchanged. INTx, MSI and PME events from other sources are also unaffected.
The enhanced hot-plug signalling mechanism supported by the PES12T3G2 is graphically illustrated in
Figure 7.4. This figure provides a conceptual summary of the enhanced hot-plug signalling mechanism in
the form of a pseudo logic diagram. Logic gates in this diagram are intended for conveying general
concepts, and not for direct implementation.
Figure 7.4 PES12T3G2 Hot-Plug Event Signalling
Command
Completed
RW1C
Attention Button
Pressed
Power Fault
Detected
MRL Sensor State
Changed
Presence Detected
Changed
Data Link Layer
State Changed
Command
Completed Enable
RW
Attention Button
Pressed Enable
Power Fault
Detected Enable
MRL Sensor State
Changed Enable
Presence Detected
Changed Enable
Data Link Layer
State Changed Enable
RW1C
RW1C RW1C
RW1C RW1C
RW1C RW1C
RW1C RW1C
RW1C RW1C
RW
RW
RW
RW
RW
PME Enable
Bit
RW
Activate Wakeup
Mechanism
Hot-Plug Interrupt
Enable
RW
RW
MSI Enable
Activate MSI
Mechanism
Activate INTx
Mechanism
RW
Interrupt
Disable
General Purpose Event
Enable
RW
General Purpose
Event Mechanism
Slot Control
Register
Slot Status
Register
Bit