Rev. 6.0, 07/02, page 842 of 986
22.3
AC Characteristics
In principle, SH7750 Series input should be synchronous. Unless specified otherwise, ensure that
the setup time and hold times for each input signal are observed.
Table 22.17 Clock Timing (HD6417750RBP240)
Item
Symbol
Min
Typ
Max
Unit
CPU, FPU, cache, TLB
1
—
240
External bus
1
—
120
Operating
frequency
Peripheral modules
f
1
—
60
MHz
Table 22.18 Clock Timing (HD6417750RF240)
Item
Symbol
Min
Typ
Max
Unit
CPU, FPU, cache, TLB
1
—
240
External bus
1
—
84
Operating
frequency
Peripheral modules
f
1
—
60
MHz
Table 22.19 Clock Timing (HD6417750BP200M, HD6417750SBP200, HD6417750RBP200)
Item
Symbol
Min
Typ
Max
Unit
CPU, FPU, cache, TLB
1
—
200
External bus
1
—
100
Operating
frequency
Peripheral modules
f
1
—
50
MHz
Table 22.20 Clock Timing (HD6417750RF200)
Item
Symbol
Min
Typ
Max
Unit
CPU, FPU, cache, TLB
1
—
200
External bus
1
—
84
Operating
frequency
Peripheral modules
f
1
—
50
MHz
Table 22.21 Clock Timing (HD6417750SF200)
Item
Symbol
Min
Typ
Max
Unit
CPU, FPU, cache, TLB
1
—
200
External bus
1
—
67
Operating
frequency
Peripheral modules
f
1
—
50
MHz
Summary of Contents for SH7750 series
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