Hitachi SH7750 series, Hardware Manual

Page: 250 / 1037

Rev. 6.0, 07/02, page 200 of 986
8.2 Parallel-Executability
Instructions are categorized into six groups according to the internal function blocks used, as
shown in table 8.1. Table 8.2 shows the parallel-executability of pairs of instructions in terms of
groups. For example, ADD in the EX group and BRA in the BR group can be executed in parallel.
Table 8.1 Instruction Groups
1. MT Group
CLRT CMP/HI Rm,Rn MOV Rm,Rn
CMP/EQ #imm,R0 CMP/HS Rm,Rn NOP
CMP/EQ Rm,Rn CMP/PL Rn SETT
CMP/GE Rm,Rn CMP/PZ Rn TST #imm,R0
CMP/GT Rm,Rn CMP/STR Rm,Rn TST Rm,Rn
2. EX Group
ADD #imm,Rn MOVT Rn SHLL2 Rn
ADD Rm,Rn NEG Rm,Rn SHLL8 Rn
ADDC Rm,Rn NEGC Rm,Rn SHLR Rn
ADDV Rm,Rn NOT Rm,Rn SHLR16 Rn
AND #imm,R0 OR #imm,R0 SHLR2 Rn
AND Rm,Rn OR Rm,Rn SHLR8 Rn
DIV0S Rm,Rn ROTCL Rn SUB Rm,Rn
DIV0U ROTCR Rn SUBC Rm,Rn
DIV1 Rm,Rn ROTL Rn SUBV Rm,Rn
DT Rn ROTR Rn SWAP.B Rm,Rn
EXTS.B Rm,Rn SHAD Rm,Rn SWAP.W Rm,Rn
EXTS.W Rm,Rn SHAL Rn XOR #imm,R0
EXTU.B Rm,Rn SHAR Rn XOR Rm,Rn
EXTU.W Rm,Rn SHLD Rm,Rn XTRCT Rm,Rn
MOV #imm,Rn SHLL Rn
MOVA @(disp,PC),R0 SHLL16 Rn
3. BR Group
BF disp BRA disp BT disp
BF/S disp BSR disp BT/S disp