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CRYP
Note: Only APM32F415xG/APM32F417xExG series products have such module.
Introduction
The encryption processor can encrypt and decrypt the data to be transmitted
with DES, triple DES or AES algorithms.
Main characteristics
Support DES, TDES and AES encryption and decryption operations
DES/TDES
Support ECB and CBC link algorithms
Support 64-bit, 128-bit, and 92-bit keys
Support the use of 2×32-bit initialization vector (IV) in CBC mode
AES
Support ECB, CBC and CTR link algorithms
Support 128-bit, 192-bit and 256-bit keys
Support the use of 4×32-bit initialization vector (IV) in CBC mode
Common points of DES/TDES and AES
Adopt IN and OUT FIFO
Adopt automatic data flow control and support DMA
Adopt data exchange logic and support 1-bit, 8-bit, 16-bit or 32-bit
data
Interrupt
Output FIFO service interrupt
When there are one or more data items in the output FIFO, the output FIFO
service interrupt will be generated. Perform read operation to the output FIFO
until all valid words are read, and this interrupt can be cleared.
Set OUTMISTS bit of CRYP_MINTSTS register to 1 and an output FIFO service
interrupt will be generated.
Input FIFO service interrupt
When there are less than four words in the input FIFO, an input FIFO service
interrupt will be generated. Perform write operation to the input FIFO until there
are no less than four words in the FIFO, and the interrupt can be cleared.
Set INMISTS bit of CRYP_MINTSTS register to 1 and set CRYPEN bit of
CRYP_CTRL register to 1, and an input FIFO service interrupt will be
