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Random number generator (RNG)
Introduction
RNG is a random number generator, which provides a 32-bit random number in
the master reading based on continuous analog noise.
Main characteristics
Provide 32-bit random number generated by the analog generator
The interval between two consecutive random numbers is 40 PLLCLK48
clock signal cycles
Monitor RNG entropy to mark abnormal behaviors
Disabling RNG can reduce the power consumption
Functional description
The random number generator is realized by analog circuit. This circuit provides
seeds for the linear feedback shift register to generate 32-bit random numbers.
Multiple ring oscillators form an analog circuit, and the seeds are generated by
XOR operation through the frequency output by the oscillator. PLLCLK48 is
dedicated clock of RNG_LFSR, and it provides clock information for it at a
constant frequency, so the quality of random numbers has nothing to do with the
frequency of HCLK. After RNG_LFSR introduces a large number of seeds, the
content will be transferred to RNG_DATA register. Meanwhile, the system will
monitor the seeds and PLLCLK48. The status bit in RNG_STS register indicates
the time when an abnormal sequence occurs on the seed or the PLLCLK48
clock frequency is too low. An interrupt will be generated when an error is
detected.
Enable RNG
The setting sequence of enabling RNG is as follows:
Enable interrupt and an interrupt will be generated when the random
number is ready or an error occurs.
A random number will be generated when RNG_CTRL[RNGEN]=1. At
this time, the analog part, RNG_LFSR and error detector will be
activated
.
At the time of each interrupt, when CLKERINT bit and FSINT bit of
RNG_STS register are set to 0 and DATARDY=1, RNG_DATA register
can be read.
