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Counter register (TMRx_CNT)
Offset address: 0x24
Reset value: 0x0000
Field
Name
R/W
Description
15:0
CNT
R/W Counter Value
Prescaler register (TMRx_PSC)
Offset address: 0x28
Reset value: 0x0000
Field
Name
R/W
Description
15:0
PSC
R/W
Prescaler Value
Clock frequency of counter (CK_CNT)
＝
f
CK_PSC
/(PSC+1)
Auto reload register (TMRx_AUTORLD)
Offset address: 0x2C
Reset value: 0xFFFF
Field
Name
R/W
Description
15:0
AUTORLD R/W
Auto Reload Value
When the value of auto reload is empty, the counter will not count.
Repeat count register (TMRx_REPCNT)
Offset address: 0x30
Reset value: 0x0000
Field
Name
R/W
Description
7:0
REPCNT R/W
Repetition Counter Value
When the count value of the repeat counter is reduced to 0, an update
event will be generated, and the counter will start counting again from the
REPCNT value; the new value newly written to this register is valid only
when an update event occurs in next cycle.
15:8
Reserved
Channel 1 capture/compare register (TMRx_CC1)
Offset address: 0x34
Reset value: 0x0000
Field
Name
R/W
Description
15:0
CC1
R/W
Capture/Compare Channel 1 Value
When the capture/compare channel 1 is configured as input mode:
CC1 contains the counter value transmitted by the last input capture channel
1 event.
When the capture/compare channel 1 is configured as output mode:
CC1 contains the current load capture/compare register value
Compare the value CC1 of the capture and compare channel 1 with the
value CNT of the counter to generate the output signal on OC1.
When the output compare preload is disabled (OC1PEN=0 for TMRx_CCM1
register), the written value will immediately affect the output comparison
results;
