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each received frame at the end of receiving of each frame.
MII/RMII receive bit sequence
Each half byte is transmitted from the two bits received on RMII to MII, and the
transmitting order is from low to high.
MAC interrupt
Various events can generate an interrupt to the MAC core, and the MAC_ISTS
register describes various event interrupts. Setting the corresponding mask bit
in the interrupt mask register can prevent event interrupts from being generated.
The interrupt can be cleared by reading the corresponding state register and
other registers.
MAC filtering
Address filtering
Check the destination address and source address of all received frames and
report the corresponding address filtering state. The address check depends on
the setting of the frame filter register. The filtered frames can be identified:
multicast frames or broadcast frames. Address filtering uses the MAC address
of the station and the multi-broadcast list for address check.
Unicast destination address filtering
MAC supports 4 MAC addresses for unicast perfect filtering. If
MAC_FRAF[HUC]=0, MAC will compare whether all 48 bits of the received
unicast address match the set MAC address.
Multicast destination address filtering
The PM of MAC_FRAF register controls whether to set the MAC to pass all
multicast frames. When the PM bit is reset, the HMC bit of the MAC_FRAF
register controls the multicast address filtering.
Hash or perfect address filtering
When setting HPF bit, HUC bit ad HMC bit of MAC_FRAF register, DA filter is
configured to allow frames to pass when its DA matches hash filter or perfect
filter. This configuration is applicable to unicast and multicast frames. If the HPF
bit is reset, there is only one filtering method.
Broadcast address filtering
In the default mode, the MAC does not filter broadcast frames. However, if
MAC_FRAF[DISBF]=1, all broadcast frames will be discarded.
