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Field
Name
R/W
Description
1:0
CC1SEL
R/W
Capture/Compare Channel 1 Select
00: CC1 channel is output
01: CC1 channel is input, and IC1 is mapped on TI1
10: CC1 channel is input, and IC1 is mapped on TI2
11: CC1 channel is input, and IC1 is mapped on TRC, and only works in
internal trigger input
Note: This bit can be written only when the channel is closed
(TMRx_CCEN bit CC1EN=0).
3:2
IC1PSC
R/W
Input Capture Channel 1 Perscaler Configure
00
：
PSC=1
01
：
PSC=2
10
：
PSC=4
11
：
PSC=8
PSC is prescaled factor, which triggers capture once every PSC events.
7:4
IC1F
R/W
Input Capture Channel 1 Filter Configure
0000: Filter disabled, sampling by f
DTS
0001
：
DIV=1
，
N=2
0010
：
DIV=1
，
N=4
0011
：
DIV=1
，
N=8
0100
：
DIV=2
，
N=6
0101
：
DIV=2
，
N=8
0110
：
DIV=4
，
N=6
0111
：
DIV=4
，
N=8
1000
：
DIV=8
，
N=6
1001
：
DIV=8
，
N=8
1010
：
DIV=16
，
N=5
1011
：
DIV=16
，
N=6
1100
：
DIV=16
，
N=8
1101
：
DIV=32
，
N=5
1110
：
DIV=32
，
N=6
1111
：
DIV=32
，
N=8
Sampling frequency=timer clock frequency/DIV; the filter length=N,
indicating that a jump is generated by every N events.
15:8
Reserved
Capture/Compare enable register (TMRx_CCEN)
Offset address: 0x20
Reset value: 0x0000
Field
Name
R/W
Description
0
CC1EN
R/W
Capture/Compare Channel1 Output Enable
When the capture/compare channel 1 is configured as output:
0: Output is disabled
1: Output is enabled
When the capture/compare channel 1 is configured as input:
This bit determines whether the value CNT of the counter can be
captured and enter TMRx_CC1 register
0: Capture is disabled
