Avaya P332G-ML, User Manual

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Chapter 1 Overview
4 P334T -ML User’s Guide
Link Aggregation Group (LAG)
LAG provides increased bandwidth and redundancy for critical high-bandwidth
applications such as inter-stack links and connections to servers. With the P334T-
ML, you can aggregate the two GBIC ports to form a LAG, you can aggregate the
bandwidths of 6 groups of up to 8 10/100BaseT ports in a LAG, for a maximum of 7
LAGs per switch.
When created, each LAG is automatically assigned a logical Port Number. This
logical Port Number can then be used as any regular panel port for all configuration
required for the LAG (Spanning Tree, Redundancy, etc.).
The relationship between the P334T-ML Port Numbers and the LAG logical Port
Number that will be assigned to each LAG is depicted below.
Link/Port Redundancy
Redundancy can be implemented between any two ports in the same stack at the
link level. You can also assign redundancy between any two LAGs in the stack or
between a LAG and a port. One port or LAG is defined as the primary port, and the
other as the secondary port. In case the primary port link fails, the secondary port
takes over.
Intermodule Redundancy
Intermodule redundancy includes all Port Redundancy functionality, and
additionally maintains port integrity even when the primary port link fails as the
result of a failure of the module. If the module on which the active port in an
Intermodule Redundancy pair is located is powered down or removed from the
stack, the secondary port in the Intermodule Redundancy pair takes over. Only one
pair per stack can be set for Intermodule Redundancy.
Panel Ports in the LAG Max. Number of LAGs LAG Logical Port Number
1-4, 25-28 1 101
5-8, 29-32 1 102
9-12, 33-36 1 103
13-16, 37-40
1 104
17-20, 41-44 1 105
21-24, 45-48 1 106
51,52 1 107