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PRELIMINARY
CF CONTROLLER
S3C6400X RISC MICROPROCESSOR
9-34
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
BUS_FIFO_STATUS
Register
Address
Description
Reset Value
BUS_FIFO_STATUS 0x70301990
ATA
internal AHB FIFO status
0x0000_0000
BUS_FIFO_STATUS
Bits
Description
R/W
Reset Value
Reserved [31:19]
Reserved bits
R
0x0
BUS_STATE[2:0]
[18:16]
3’b000 : IDLE
Another value is in operation.
R 0x00
Reserved [15:14]
Reserved bits
R
0x0
BUS_FIFO_RDPNT
[13:8]
bus fifo read pointer
R
0x00
Reserved [7:6]
Reserved
bits
R
0x0
BUS_FIFO_WRPNT
[5:0]
bus fifo write pointer
R
0x00
ATA_FIFO_STATUS
Register
Address
Description
Reset Value
ATA_FIFO_STATUS
0x70301994
ATA internal ATA FIFO status
0x0000_0000
ATA_FIFO_STAT
US
Bits
Description
R/W
Reset Value
Reserved [31]
Reserved
bit
R
0x0
ATA_STATE
[30:28]
PIO read data register while HOST read from
ATA device register
R 0x0000
PIO_STATE
[27:26]
2’b00 : IDLE 2’’b01 : T1
2’b10 : T2 2’b11 : TEOC
R 0x0
PDMA_STATE
[25:24]
2’b00 : IDLE 2’b01 : T1
2’b10 : T2 2’b11 : TEOC
R 0x0
Reserved [23:21]
Reserved bits
R
0x0
UDMA_STATE
[20:16]
5’b00000 : IDLE
5’b00100 : END
Another value is in UDMA operation.
R 0x00
Reserved [15:0]
Reserved bits
R
0x0