Samsung S3C6400X, Руководство пользователя, Страница: 147 / 1189

PRELIMINARY
S3C6400X RISC MICROPROCESSOR ONENAND CONTROLLER
7-17
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Register Address R/W Description Reset Value
MEM_CFG1 0x70180000 R/W Bank1 Memory Device Configuration Register 0x0000
BURST_LEN1 0x70180010 R/W Bank1 Burst Length Register 0x0000
MEM_RESET1 0x70180020 R/W Bank1 Memory Reset Register 0x0000
INT_ERR_STAT1 0x70180030 R/W Bank1 Interrupt Error Status Register 0x0000
INT_ERR_MASK1 0x70180040 R/W Bank1 Interrupt Error Mask Register 0x0000
INT_ERR_ACK1 0x70180050 R/W Bank1 Interrupt Error Acknowledge Register 0x0000
ECC_ERR_STAT1 0x70180060 W Bank1 ECC Error Status Register 0x0000
MANUFACT_ID1 0x70180070 R Bank1 Manufacturer ID Register Mem.dep.
DEVICE_ID1 0x70180080 R Bank1 Device ID Register Mem.dep.
DATA_BUF_SIZE1 0x70180090 R Bank1 Data Buffer Size Register Mem.dep.
BOOT_BUF_SIZE1 0x701800A0 R Bank1 Boot Buffer Size Register Mem.dep.
BUF_AMOUNT1 0x701800B0 R Bank1 Amount of Buffer Register Mem.dep.
TECH1 0x701800C0 R Bank1 Technology Register Mem.dep.
FBA_WIDTH1 0x701800D0 R/W Bank1 FBA Width Register 0x000A
FPA_WIDTH1 0x701800E0 R/W Bank1 FPA Width Register 0x0006
FSA_WIDTH1 0x701800F0 R/W Bank1 FSA Width Register 0x0002
REVISION1 0x70180100 R Bank1 Revision Register 0x0002
DATARAM01 0x70180110 R/W Bank1 Dataram0 Code Register 0x0002
DATARAM11 0x70180120 R/W Bank1 Dataram1 Code Register 0x0003
SYNC_MODE1 0x70180130 R Bank1 Synchronous Mode Register 0x0000
TRANS_SPARE1 0x70180140 R/W Bank1 Transfer Size Register 0x0000
Reserved 0x70180150 - Reserved -
DBS_DFS_WIDTH1 0x70180160 R/W Bank1 DBS_DFS width Register 0x0000
PAGE_CNT1 0x70180170 R Bank1 Page Count Register 0x0000
ERR_PAGE_ADDR1 0x70180180 R Bank1 Error Page Address Register 0x0000
BURST_RD_LAT1 0x70180190 R Bank1 Burst Read Latency Register 0x0006
INT_PIN_ENABLE1 0x701801A0 R/W Bank1 Interrupt Pin Enable Register 0x0000
INT_MON_CYC1 0x701801B0 R/W Bank1 Interrupt Monitor Cycle Count Register 0x01F4
ACC_CLOCK1 0x701801C0 R/W Bank1 Access Clock Register 0x0003
SLOW_RD_PATH1 0x701801D0 R/W Bank1 Slow Read Path Register 0x0000
ERR_BLK_ADDR1 0x701801E0 R Bank1 Error Block Address Register 0x0000
FLASH_VER_ID1 0x701801F0 R Bank1 Flash Version ID Register Mem.dep.
Note: Mem.dep. : Memory dependent