PRELIMINARY
ELECTRICAL DATA
S3C6400X
RISC MICROPROCESSOR
41-14
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Table 41-8. ROM/SRAM Bus Timing Constants
(VDDINT= 1.0V
±
0.05V, TA = -40 to 85
°
C, VDDM0 = 2.85V
±
0.15V, 2.5V
±
0.25V, 1.8V
±
0.15V)
Parameter Symbol
Min
Max
Unit
ROM/SRAM Address Delay
t
RAD
8.50
ns
ROM/SRAM Chip Select 0 Delay
t
RCD
8.08
ns
ROM/SRAM Chip Select 1 Delay
t
RCD
7.78
ns
ROM/SRAM Chip Select 2 Delay
t
RCD
7.76
ns
ROM/SRAM nOE(Output Enable) Delay
t
ROD
8.60
ns
ROM/SRAM nWE(Write Enable) Delay
t
RWD
8.21
ns
ROM/SRAM Byte Enable Delay
t
RBED
8.46
ns
ROM/SRAM Write Byte Enable Delay
t
RWBED
8.46
ns
ROM/SRAM Output Data Delay
t
RDD
8.89
ns
ROM/SRAM Read Data Setup Time
t
RDS
2.00 ns
ROM/SRAM Write Data Hold Time
t
RDH
1.00 ns
ROM/SRAM nWAIT Setup Time
t
WS
3.50 ns
ROM/SRAM nWAIT Hold Time
t
WH
1.00 ns