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UM0404
Multiply-accumulate unit (MAC)
concatenation of MA- and MB-buses. Product and Concatenation can be shifted left by one
according to MP for the multiplier or to the instruction for the concatenation. The B-input port
is fed either by the 40-bit shifted/not shifted and inverted/not inverted accumulator or by
00’0000’0000h. A-input and B-input ports can receive 00’0000’0000h to allow direct
transfers from the B-source and A-source, respectively, to the Accumulator (case of
Multiplication and Shift). The output of the arithmetic unit goes to the Accumulator.
It is also possible to saturate the Accumulator on a 32-bit value, automatically after every
accumulation. Automatic saturation is enabled by setting the saturation bit MS in the MCW
register. When the Accumulator is in the saturation mode and a 32-bit overflow occurs, the
accumulator is loaded with either the most positive or the most negative value representable
in a 32-bit value, depending on the direction of the overflow. The value of the Accumulator
upon saturation is 00’7FFF’FFFFh (positive) or FF’8000’0000h (negative) in signed
arithmetic. Automatic saturation sets the SL flag MSW. This flag is a sticky flag which means
it stays set until it is explicitly reset by the user.
40-bit overflow of the Accumulator sets the SV flag in MSW. This flag is also a sticky flag.
4.2.6 The
40-bit
signed accumulator register
The 40-bit accumulator consists of three smaller registers, MAL, MAH, and MAE. MAH and
MAL are 16-bit wide, MAE is 8-bit wide. MAE is the most significant byte (MSB) of the 40-bit
accumulator, however it is accessed as the least significant byte (LSB) of the MSW register
and performs guarding function.
On MAH write operations, the value of the accumulator is automatically adjusted to signed
extended 40-bit format. This means:
•
MAE is automatically loaded by zeros for positive numbers (MAH has 0 in the most
significant bit). In case the of a negative number (MAH has 1 in the most significant bit)
the MAE is loaded with ones, representing the extended 40-bit negative number in 2’s
complement notation. Then the extended 40-bit value is equal to the 32-bit value
without extension. In other words, after this extension, MAE does not contain significant
bits. Generally, this condition is present when the highest 9 bits of the 40-bit signed
result are the same.
•
MAL is automatically loaded with zeros.
During the 40-bit accumulator operations the result may be greater than 32 bits and
therefore, the MAE content changes. The MSW.ME extension flag is set because the signed
result of the 40-bit accumulator has overflown the 32-bit boundary. This condition is right
when the highest 9 bits of the 40-bit signed result are not the same. This also means that
MAE contains significant bits.
Note:
Most of the CoXXX operations specify the 40-bit accumulator register as a source or a
destination operand. Operands loaded in 32-bit format are extended to 40-bit signed
numbers with MAE equal to 00h (for positive numbers) or FFh (for negative numbers).
Because writing to MAH forces zero value in MAL and sign extension in MAE, MAH must be
written first and MAL second. Some care must be taken in the order these registers are
handled, for example in saving status stacking as shown in the following example:
PUSH MSW
PUSH MAL
PUSH MAH
; Last one because later impact on MAE, MAL
POP MAH
; First one because impact on MAE, MAL