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UM0404 The central processing unit (CPU)
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Write back: All external operands and the remaining operands within the IRAM space
are written back.
Injected instructions are generated internally by the machine to provide extra time for
instructions that require more than one instruction cycle. Instructions are automatically
injected into the decode stage of the pipeline, they pass through the remaining stages like
every standard instruction. Program interrupts are performed by the same method of
injecting instructions.
Figure 9. Sequential instruction pipelining
3.1.1 Sequential instruction processing
Each single instruction has to pass through each of the four pipeline stages regardless of
whether all possible stage operations are really performed or not. Since passing through
one pipeline stage takes at least one instruction cycle, any isolated instruction takes at least
four instruction cycles to be completed. Pipelining, however, allows parallel (simultaneous)
processing of up to four instructions. Therefore, as soon as the pipeline has been filled,
most instructions appear to be processed during one instruction cycle (see
Figure 9 on
page 55 ).
Specification of instruction execution time always refers to the average execution time for
pipelined parallel instruction processing (see
Figure 9 on page 55 ).
3.1.2 Standard branch instruction processing
When a branch is taken, it is necessary to perform the branched target instruction, before
the current instruction in the pipeline. Therefore, at least one additional instruction cycle is
required to fetch the branch target instruction.
This extra instruction cycle is provided by means of an injected instruction (see Figure 10 on
page 56 ). If a conditional branch is not taken, there is no deviation from the sequential
program flow, and thus no extra time is required. In this case the instruction after the branch
instruction will enter the decode stage of the pipeline at the beginning of the next instruction
cycle after decode of the conditional branch instruction.
1 instruction
cycle
FETCH I
2
I
1
I
3
I
2
I
1
I
4
I
3
I
2
I
1
I
6
I
5
I
4
I
3
I
5
I
4
I
3
I
2
I
1
DECODE
EXECUTE
WRITEBACK
time