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UM0404
The general purpose timer units
Timer concatenation
Using the toggle bit T3OTL as a clock source for an auxiliary timer in counter mode
concatenates the core timer T3 with the respective auxiliary timer. Depending on which
transition of T3OTL is selected to clock the auxiliary timer, this concatenation forms a 32-bit
or a 33-bit timer/counter.
•
32-bit timer/counter
: If both a positive and a negative transition of T3OTL is used to
clock the auxiliary timer, this timer is clocked on every overflow/underflow of the core
timer T3. Thus, the two timers form a 32-bit timer.
•
33-bit timer/counter
: If either a positive or a negative transition of T3OTL is selected
to clock the auxiliary timer, this timer is clocked on every second overflow/underflow of
the core timer T3. This configuration forms a 33-bit timer (16-bit core timer+T3OTL+16-
bit auxiliary timer).
The count directions of the two concatenated timers are not required to be the same. This
offers a wide variety of different configurations.
T3 can operate in timer, gated timer or counter mode in this case (see
Auxiliary timer in reload mode
Reload mode for the auxiliary timers T2 and T4 is selected by setting bit-field TxM in the
respective register TxCON to ‘100b’. In reload mode the core timer T3 is reloaded with the
contents of an auxiliary timer register, triggered by one of two different signals. The trigger
signal is selected the same way as the clock source for counter mode (see
). A
transition of the auxiliary timer’s input or the output toggle latch T3OTL may trigger the
reload.
Note:
When programmed for reload mode, the respective auxiliary timer (T2 or T4) stops
independent of its run flag T2R or T4R.
1 1 0
Negative transition (falling edge) of output toggle latch T3OTL
1 1 1
Any transition (rising or falling edge) of output toggle latch T3OTL
Table 37. GPT1 auxiliary timer (counter mode) input edge selection
T2I / T4I
Triggering edge for counter increment / decrement