
DocID13284 Rev 2
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UM0404
Register set
26 Register
set
This section summarizes all registers implemented in the ST10F276, and explains the
description format used in the sections describing the function and layout of the SFRs.
For easy reference the registers (except for GPRs) are ordered in two ways:
•
Ordered by register name, to find the location of a specific register.
•
Ordered by address, to check which register a given address references.
26.1
Register description format
Along the document, the function and the layout of the different registers is described in a
specific format. The examples below explain this format.
A word register looks like this:
REG_NAME (A16h / A8h)
SFR/ESFR/XBUS
Reset Value: ****h
A byte register looks like this:
REG_NAME (A16h / A8h)
SFR/ESFR/XBUS
Reset Value: - - **h
Elements:
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
wr
only
hw
bit
rd
only
std bit
hw
bit
bit field
bit field
W
RW
R
RW
RW
RW
RW
Bit
Function
bit(field) name
Explanation of bit(field) name
Description of the functions controlled by this bit(field).
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
std bit
hw
bit
bit field
bit field
RW
RW
RW
RW
REG_NAME
Name of this register
A16h / A8h
Long 16-bit address / Short 8-bit address
SFR
/
ESFR/XBUS
Register space (SFR, ESFR or XBUS Register)
(* *) * *
Register contents after reset
0/1
: defined
x
: undefined (undefined (’
x
’) after Power-On)
U
: unchanged
hw bit
bits that are set/cleared by hardware are written in
bold
-
bits that are not implemented or reserved: never write to these bits