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UM0404
Pulse width modulation module
Figure 145. PWM channel block diagram
17.1 Operating
modes
The PWM module provides four different operating modes:
•
Mode 0 standard PWM
generation (edge aligned PWM) available on four channels
•
Mode 1 symmetrical PWM
generation (center aligned PWM) available on all four
channels
•
Burst mode
combines channels 0 and 1
•
Single shot mode
available on channels 2 and 3
Note:
The output signals of the PWM module are XORed with the outputs of the respective port
output latches. After reset these latches are cleared, so the PWM signals are directly driven
to the port pins. By setting the respective port output latch to ‘1’ the PWM signal may be
inverted (XORed with ‘1’) before being driven to the port pin. The descriptions below refer to
the standard case after reset, which is direct drive.
17.1.1
Mode 0: standard PWM generation (edge aligned PWM)
Mode 0 is selected by clearing the respective bit PMx in register PWMCON1 to ‘0’. In this
mode the timer PTx of the respective PWM channel is always counting up until it reaches
the value in the associated period shadow register. Upon the next count pulse the timer is
reset to 0000h and continues counting up with subsequent count pulses.
The PWM output signal is switched to high level when the timer contents are equal to or
greater than the contents of the pulse width shadow register.
The signal is switched back to low level when the respective timer is reset to 0000h, that
means below the pulse width shadow register. The period of the resulting PWM signal is
determined by the value of the respective PPx shadow register plus 1, counted in units of
the timer resolution.
PWM_Period
Mode0
= [PPx] + 1
PPx Period Register
Comparator
PTx
16-bit Up/Down Counter
Shadow Register
PWx Pulse Width Register
Input
Run
Control
Clock 1
Clock 2
Comparator
*
*
*
Up/Down/
Clear Control
Match
Output Control
Match
Write Control
* User readable & writeable register
Enable
POUTx
x = 3...0