ST ST10F276E, User Manual, Page: 464 / 564

Real time clock UM0404
464/564 DocID13284 Rev 2
22 Real time clock
The Real Time Clock is an independent timer, which clock is directly derived from the
oscillator clock (either the main on-chip oscillator or the 32 kHz on-chip oscillator), so that it
can be maintained running even in Idle or Power Down mode (if enabled to) or again in
Stand-by mode. Registers access is implemented onto the XBUS. This module is designed
for the following purposes:
•
Generate the current time and date for the system.
•
Provide cyclic time based interrupt on Port2 external interrupts every ‘RTC basic clock
tick’ and after
n ‘RTC basic clock ticks’ ( n is programmable) if enabled.
•
Long term measurements (58-bit timer).
•
Exit the ST10F276 from Power Down mode (if PWDCFG of SYSCON set) after a
programmed delay.
The real time clock is based on two main blocks of counters. The first block is a prescaler
which generates a basic reference clock (for example a 1 second period). This basic
reference clock is coming out of a 20-bit DIVIDER (4-bit MSB RTCDH counter and 16-bit
LSB RTCDL counter). This 20-bit counter is driven by an input clock derived from the on-
chip oscillator clock (XTAL1 input), pre-divided by a 1/64 fixed counter (see
Figure 189 ).
This 20-bit counter is loaded at each basic reference clock period with the value of the 20-bit
PRESCALER register (4-bit MSB RTCPH register and 16-bit LSB RTCPL register). The
value of the 20-bit RTCP register determines the period of the basic reference clock.
A timed interrupt request (RTCSI) may be sent on each basic reference clock period. The
second block of the RTC is a 32-bit counter (16-bit RTCH and 16-bit RTCL). This counter
may be initialized with the current system time. RTCH/RTCL counter is driven with the basic
reference clock signal. In order to provide an alarm function the contents of RTCH/RTCL
counter is compared with a 32-bit alarm register (16-bit RTCAH register and 16-bit RTCAL
register). The alarm register may be loaded with a reference date. An alarm interrupt
request (RTCAI), may be generated when the value of RTCH/RTCL counter matches the
reference date of RTCAH/RTCAL register.
The timed RTCSI and the alarm RTCAI interrupt requests can trigger a fast external
interrupt via EXISEL register of Port2 and wakes the ST10 up when running in Power Down
mode. Using the RTCOFF bit of RTCCON register, the user may switch off the clock
oscillator when entering the Power Down mode.