ST ST10F276E, User Manual, Page: 140 / 564

Parallel ports UM0404
140/564 DocID13284 Rev 2
P0H (FF02h / 81h) SFR Reset Value: - - 00h
DP0L (F100h / 80h) ESFR Reset Value: - - 00h
DP0H (F102h / 81h) ESFR Reset Value: - - 00h
6.2.1 Alternate functions of PORT0
When an external bus is enabled, PORT0 is used as data bus or address/data bus.
Note that an external 8-bit de-multiplexed bus only uses P0L, while P0H is free for I/O
(provided that no other bus mode is enabled).
PORT0 is also used to select the system start-up configuration. During reset, PORT0 is
configured to input, and each line is held high through an internal pull-up device.
Each line can now be individually pulled to a low level (see DC-level specifications in the
respective datasheets) through an external pull-down device. A default configuration is
selected when the respective PORT0 lines are at a high level. Through pulling individual
lines to a low level, this default can be changed according to the needs of the applications.
The internal pull-up devices are designed such that an external pull-down resistors (see
datasheet specification) can be used to apply a correct low level.
These external pull-down resistors can remain connected to the PORT0 pins also during
normal operation: however, care has to be taken such that they do not disturb the normal
function of PORT0 (this might be the case, for example, if the external resistor is too strong).
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
- - - - - - - - P0H.7P0H.6P0H.5P0H.4P0H.3P0H.2P0H.1P0H.0
RW RW RW RW RW RW RW RW
Bit Function
P0X.y Port data register P0H or P0L bit y
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
- - - - - - - -
DP0L.
7
DP0L.
6
DP0L.
5
DP0L.
4
DP0L.
3
DP0L.
2
DP0L.
1
DP0L.
0
RW RW RW RW RW RW RW RW
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
- - - - - - - -
DP0H.
7
DP0H.
6
DP0H.
5
DP0H.
4
DP0H.
3
DP0H.
2
DP0H.
1
DP0H.
0
RW RW RW RW RW RW RW RW
Bit Function
DP0X.y
Port direction register DP0H or DP0L bit y
’0’: Port line P0X.y is an input (high-impedance).
’1’: Port line P0X.y is an output.