DocID13284 Rev 2
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UM0404
Parallel ports
This feature is implemented for ports P2, P3, P4 (partially), P6, P7 and P8 (see respective
sections), and is controlled through the respective Open Drain Control Registers ODPx.
These registers allow the individual bit wise selection of the open drain mode for each port
line. If the respective control bit ODPx.y is ‘0’ (default after reset), the output driver is in the
push / pull mode. If ODPx.y is ‘1’, the open drain configuration is selected. Note that all
ODPx registers are located in the ESFR space (see
).
Note:
When XPWM, XASC and XSSC are used (enabled through XPERCON) the open-drain
mode of the related pins is controlled by a set of XBUS registers (XPWMPORT, XS1PORT,
XSSCPORT).
When I
2
C is enabled (through XPERCON), the related pins of Port4 are automatically set to
open-drain mode (ODP4 register is bypassed when I
2
C is active; besides CAN2 is not
accessible when I
2
C is active unless remapped in parallel to CAN1).