Schweitzer Engineering Laboratories SEL-351-5, Instruction Manual

Page: 643 / 706

G.13
Date Code 20070117
Instruction Manual SEL-351-5, -6, -7 Relay
Setting SEL
OGIC
Control Equations
Processing Order and Processing Interval
Asynchronous processing: The Relay Word bits in the following table are
processed separately from the above list. They can be thought of as being
processed just before (or just after)
Table G.3 .
Torque Control for Instantaneous/ Definite-
Time Overcurrent Elements
(67P1TC–67P4TC, 67N1TC–67N4TC,
67G1TC–67G4TC, 67Q1TC–67Q4TC) (67P1TC–67P4TC, 67N1TC–67N4TC,
67G1TC–67G4TC, 67Q1TC–67Q4TC) Section 3
Switch-onto-Fault Logic (CLMON) (CLMON) Section 5
Instantaneous/Definite-Time Overcurrent
Elements
(67P1TC–67P4TC, 67N1TC–67N4TC,
67G1TC–67G4TC, 67Q1TC–67Q4TC) 50P1, 67P1, 67P1T, 50P2, 67P2, 67P2S, 67P2T, 50P3, 67P3,
67P3T, 50P4, 67P4, 67P4T, 50N1, 67N1, 67N1T, 50N2, 67N2,
67N2S, 67N2T, 50N3, 67N3, 67N3T, 50N4, 67N4, 67N4T, 50G1,
67G1, 67G1T, 50G2, 67G2, 67G2S, 67G2T, 50G3, 67G3, 67G3T,
50G4, 67G4, 67G4T, 50Q1, 67Q1, 67Q1T, 50Q2, 67Q2, 67Q2S,
67Q2T, 50Q3, 67Q3, 67Q3T, 50Q4, 67Q4, 67Q4T Section 3
Time-Overcurrent Elements
(51PTC, 51ATC, 51BTC,
51CTC, 51NTC, 51GTC, 51QTC) 51P, 51A, 51B, 51C, 51N, 51G, 51Q, 51PT, 51AT, 51BT, 51CT,
51NT, 51GT, 51QT, 51PR, 51AR, 51BR, 51CR, 51NR, 51GR,
51QR Section 3
Switch-onto-Fault Logic (CLMON) SOTFE Section 5
Trip Logic
(TR, TRSOTF, TRCOMM, DTT, ULTR)
and Communications-Assisted Trip
(PT1, LOG1, PT2, LOG2, BT) Schemes (TR, TRCOMM, TRSOTF, DTT, ULTR, PT1, LOG1, PT2, LOG2,
BT), PT, Z3RB, EKEY, KEY, WFC, ECTT, UBB2, PTRX2, UBB1,
PTRX1, UBB, DSTRT, Z3XT, NSTRT, STOP, BTX, PTRX, TRIP Section 5
Close Logic
(CL, ULCL)
Reclosing Relay
(79RI, 79RIS, 79DTL, 79DLS, 79SKP,
79STL, 79BRS, 79SEQ, 79CLS) (CL, ULCL, 79RI, 79RIS, 79DTL, 79DLS, 79SKP, 79STL, 79BRS,
79SEQ, 79CLS), 79LO, 79CY, 79RS, RCSF, RSTMN, OPTMN,
CLOSE, CF, SH0, SH1, SH2, SH3, SH4 Section 6
Breaker Monitor (BKMON) (BKMON), BCWA, BCWB, BCWC, BCW Section 8
SEL
OGIC
Control Equation
Variables/Timers (SV1–SV16)
{(SV n ), SV n , SV n T, where n = 1 to 16} Section 7
OUT101–OUT107
OUT201–OUT212 (extra I/O board) OUT101–OUT107
OUT201–OUT212 (extra I/O board) Section 7
Display Points (DP1–DP16) (DP1–DP16) Section 7
Setting Group control (SS1–SS6) (SS1–SS6) Section 7
Event Report Trigger (ER) (ER) Section 12
Fault detector for Target Logic
and Metering (FAULT) (FAULT) Section 5 and
Section 8
Transmit M
IRRORED
B
ITS
(TMB1A–TMB8A, TMB1B–TMB8B)
{(TMB m A), TMB m A, where m = 1 to 8}
{(TMB n B), TMB n B, where n = 1 to 8}
Appendix I
Alarm ALARM Section 13
Table G.3 Processing Order of Relay Elements and Logic (Top to Bottom) (Sheet 2 of 2)
Relay Elements and Logic
(Related SEL
OGIC
Control Equations
Listed in Parentheses)
Order of Processing of the SEL
OGIC
Control Equations (Listed
in Parentheses) and Relay Word Bits
Reference
Instruction
Manual
Section
Target Reset TRGTR Section 5
Setting Group indication (SS1–SS6) SG6–SG1 Section 7
Breaker remote control bits CC, OC Section 10
Demand Ammeters QDEM, GDEM, NDEM, PDEM Section 8
M
IRRORED
B
ITS
element status RBADA, CBADA, RBADB, CBADB Appendix I
Voltage input configuration DELTA, 3V0 Section 9