User Manual 3153
Getting Started 1-11
Reference Clock
Input
The reference clock input accepts a 10 MHz, TTL level signal to replace
the CLK10 reference. The reference clock input is active only when
selected.
Operating Modes
Each of the three channels can be programmed to operate in one
of four operating modes: continuous, triggered, gated, and
counted burst. These modes are described below. These modes
are identical for each channel.
In master-slave mode, the master overrides the operating modes of the
slave channels. For example, channel 1 was in triggered mode and
channel 2 is in continuous mode. Coupling channel 2 as slave, modifies
its operating mode to triggered mode because channel 1 was in
triggered mode when channel 2 was made slave.
As was discussed above, when channel 1 is in triggered mode, all other
channels are modified automatically to operate in triggered mode. In this
case, all channels will start generating waveforms when a valid trigger
signal is received at the channel 1 trigger. Note that synchronization in
master-slave mode does not require that all waveforms be equal in
length. All waveforms will start at exactly the same time and will wait for
the longest waveform to complete.
Continuous Mode
In normal continuous mode, the selected waveform is generated
continuously at the selected frequency, amplitude, and offset.
Triggered Mode
In triggered mode, the Model 3153 circuits are armed to generate one
output waveform. The trigger circuit is sensitive to transitions at the
trigger input. Select between positive or negative transitions to trigger
the instrument. You may also program the trigger level (channel 1 only)
to the desired threshold level. When triggered, the generator outputs
one waveform cycle and remains idle at the last point of the waveform.
The Model 3153 can be armed to receive a trigger signal from a front
panel connector, a VXI backplane TTLTRG<n> or ECLTRG0, or from an
internal, programmable trigger generator.
The trigger signal, whether it comes from the front panel or from the
VXIbus, has to pass through some electrical circuits. These circuits
cause a small delay known as system delay. System delay cannot be
eliminated completely. It is, however, minimized in the Model 3153 to
approximately 100 ns maximum. System delay is a factor that must be
considered when applying a trigger signal. It defines how long it will take
from a valid trigger edge to the moment that the output reacts.
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