User Manual 3153
SCPI Command Reference 4-17
The SCPI Status
Registers
The Model 3153 uses the Status Byte register group and the Standard
Event register group to record various instrument conditions. Figure 4-1
shows the SCPI status system.
An Event Register is a read-only register that reports defined conditions
within the generator. Bits in an event register are latched. When an
event bit is set, subsequent state changes are ignored. Bits in an event
register are automatically cleared by a query of that register or by
sending the *CLS command. The *RST command or device clear does
not clear bits in an event register. Querying an event register returns a
decimal value, which corresponds to the binary-weighted sum of all bits,
set in the register.
An Event Register defines which bits in the corresponding event register
are logically ORed together to form a single summary bit. The user can
read from and write to an Enable Register. Querying an Enable Register
will not clear it. The *CLS command does not clear Enable Registers but
it does clear bits in the event registers. To enable bits in an enable
register, write a decimal value that corresponds to the binary-weighted
sum of the bits required to enable in the register.
The Status Byte
Register (STB)
The Status Byte summary register contains conditions from the other
registers. Query data waiting in the generator's output buffer is
immediately reported through the Message Available bit (bit 4). Bits in
the summary register are not latched. Clearing an event register will
clear the corresponding bits in the Status Byte summary register.
Description of the various bits within the Status Byte summary register
is given in the following:
Bit 0
- Decimal value 1. Not used, always set to 0.
Bit 1
- Decimal value 2. Not used, always set to 0.
Bit 2
- Decimal value 4. Not used, always set to 0.
Bit 3
- Decimal value 8. Not used, always set to 0.
Bit 4
- Decimal value 16. Message Available Queue Summary
Message (MAV). The state of this bit indicates whether or not
the output queue is empty. The MAV summary message is true
when the output queue is not empty. This message is used to
synchronize information exchange with the controller. The
controller can, for example, send a query command to the
device and then wait for MAV to become true. If an application
program begins a read operation of the output queue without
first checking for MAV, all system bus activity is held up until the
device responds.
Bit 5
- Decimal value 32. Standard Event Status Bit (ESB)
Summary Message. This bit indicates whether or not one or
more of the enabled ESB events have occurred since the last
reading or clearing of the Standard Event Status Register.
Bit 6
- Decimal value 64. Master Summary Status
(MSS)/Request Service (RQS) Bit.
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